Relaxation oscillator having high immunity to changes in supply voltage

Claim 1

A RELAXATION OSCILLATOR COMPRISING: (A) A CIRCUIT GROUND, (B) FIRST AND SECOND CIRCUIT POINTS, (C) A CURRENT-LIMITING RESISTOR AND A CHARGING CAPACITOR CONNECTED IN SERIES BETWEEN SAID FIRST CIRCUIT POINT AND GROUND, SAID RESISTOR AND CAPACITOR BEING JOINED AT A FIRST JUNCTION, (D) FIRST MEANS CONNECTED TO SAID FIRST CIRCUIT POINT FOR SUPPLYING DIRECT CURRENT TO SAID FIRST CIRCUIT POINT, (E) SECOND MEANS CONNECTED BETWEEN SAID SECOND CIRCUIT POINT AND SAID FIRST CIRCUIT POINT, AND THIRD MEANS CONNECTED BETWEEN SAID SECOND CIRCUIT POINT AND GROUND, WHEREBY A REFERENCE VOLTAGE IS DERIVED AT SAID SECOND CIRCUIT POINT FROM THE DIRECT CURRENT APPLIED TO SAID FIRST CIRCUIT POINT, (F) FOURTH MEANS FOR SENSING THE DIFFERENCE VOLTAGE BETWEEN THE VOLTAGE ACROSS SAID CAPACITOR AND SAID REFERENCE VOLTAGE AND HAVING AN OUTPUT TERMINAL FOR PROVIDING A FIRST PULSE WHEN SAID VOLTAGE ATTAINS A PREDETERMINED VALUE, SAID FOURTH MEANS COMPRISING: (1) A SECOND RESISTOR AND A SECOND CAPACITOR CONNECTED IN SERIES BETWEEN SAID FIRST AND SECOND CIRCUIT POINTS, (2) A FIRST LOAD RESISTOR HAVING ONE END CONNECTED TO SAID SECOND CIRCUIT POINT, (3) A THREE-TERMINAL SEMICONDUCTOR SWITCH HAVING ITS CONTROL TERMINAL CONNECTED TO SAID FIRST JUNCTION AND ITS OTHER TWO TERMINALS CONNECTED TO DISCHARGE SAID SECOND CAPACITOR THROUGH SAID SEMICONDUCTOR SWITCH AND SAID FIRST LOAD RESISTOR, THEREBY DEVELOPING A VOLTAGE PULSE ACROSS SAID FIRST LOAD RESISTOR WHEN SAID DIFFERENCE VOLTAGE ATTAINS A PREDETERMINED VALUE, AND (G) FIFTH MEANS HAVING TWO OUTPUT TERMINALS CONNECTED ACROSS SAID CHARGING CAPACITOR AND HAVING AN INPUT TERMINAL CONNECTED TO SAID OUTPUT TERMINAL OF SAID FOURTH MEANS, SAID FIFTH MEANS BEING ADAPTED TO DISCHARGE SAID CHARGING CAPACITOR IN RESPONSE TO SAID FIRST PULSE.