Pulse width discriminator scanner circuit

Claim 1

A PULSE DISCRIMINATOR CIRCUIT FOR PROCESSING INPUT SIGNALS OF PREDETERMINED DURATION WHICH MAY INCLUDE UNDESIRED SIGNALS OF SHORTER DURATION, COMPRISING (A) A FIRST TRANSISTOR HAVING BASE, EMITTER, AND COLLECTOR ELECTRODES, SAID EMITTER ELECTODE BEING CONNECTED SUCH THAT SAID FIRST TRANSISTOR OPERATES AS AN EMITTER FOLLOWER, (B) MEANS FOR APPLYING SAID INPUT SIGNALS TO SAID BASE ELECTRODE, (C) MEANS FOR BIASING THE COLLECTOR ELECTRODE OF SAID FIRST TRANSISTOR WITH A PREDETERMINED POTENTIAL WHEREBY SAID FIRST TRANSISTOR IS CONDUCTIVE ON A PREDETERMINED AMPLITUDE OF SAID INPUT SIGNALS, (D) A SECOND TRANSISTOR HAVING BASE, EMITTER, AND COLLECTOR ELECTRODES, (E) A UNILATERAL CONDUCTING DEVICE CONNECTED BETWEEN THE EMITTER ELECTRODE OF SAID FIRST TRANSISTOR AND THE BASE ELECTRODE OF SAID SECOND TRANSISTOR, (F) A RESISTOR, (G) A SOURCE OF POTENTIAL, (H) MEANS FOR CONNECTING SAID RESISTOR BETWEEN SAID SOURCE OF POTENTIAL AND THE COLLECTOR ELECTRODE OF SAID POTENTIAL, (J) MEANS FOR CONNECTING THE EMITTER ELECTRODE OF SECOND TRANSISTOR TO A SOURCE OF COMMON REFERENCE POTENTIAL, (J) A CAPACITOR CONNECTED TO THE COLLECTOR ELECTRODE OF SAID SECOND TRANSISTOR AND SAID COMMON REFERENCE SOURCE, (K) A THIRD TRANSISTOR HAVING BASE, COLLECTOR, AND EMITTER ELECTRODES AND BEING CONNECTED IN AN EMITTER-FOLLOWER CONFIGURATION, THE BASE ELECTRODE OF SAID THIRD TRANSISTOR BEING CONNECTED TO THE COLLECTOR ELECTRODE OF SAID SECOND TRANSISTOR, AND THE COLLECTOR ELECTRODE OF SAID THIRD TRANSISTOR BEING COUPLED TO A SOURCE OF POTENTIAL, (L) A FOURTH TRANSISTOR HAVING BASE, COLLECTOR, AND EMITTER ELECTRODES, (M) MEANS FOR APPLYING A PREDETERMINED BIAS ON THE BASE ELECTRODE OF SAID FOURTH TRANSISTOR, (N) MEANS CONNECTING THE EMITTER ELECTRODES OF SAID THIRD AND FOURTH TRANSISTORS, AND (O) AN OUTPUT TERMINAL CONNECTED TO THE COLLECTOR ELECTRODE OF SAID FOURTH TRANSISTOR.