US3274398A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Logic circuits
Assignee: RCA Corp
•
Filing: 1963-04-01
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Granted: 1966-09-20
•
Expires: 1983-04-01
Abstract
No abstract record available.
Inventors
- 👤 Silverberg Morton
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 02:20
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/60; H10D84/611; H10D84/613; H03; H03K; H03K19/00; H03K19/01; H03K19/013; H03K19/0175; H03K19/018; H03K19/01806; H03K19/02; H03K19/08; H03K19/082
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
213 words
THE COMBINATION COMPRISING: A FIRST LOGIC CIRCUIT INCLUDING A TRANSISTOR CONNECTED IN THE GROUNDED EMITTER CONFIGURATION AND HAVING A BASE AND A COLLECTOR; AN INPUT NODE; AT LEAST ONE LEVEL SHIFT DIODE CONNECTED BETWEEN THE INPUT NODE AND THE BASE AND HAVING A DIFFUSION CAPACITANCE THAT VARIES AS A FUNCTION OF DIODE CURRENT, SAID DIODE ALSO HAVING AN OPERATING REGION OF SUBSTANTIALLY CONSTANT VOLTAGE; BIAS MEANS CONNECTED BETWEEN SAID NODE ND CIRCUIT GROUND FOR NORMALLY BIASING THE TRANSISTOR INTO SATURATION, SAID LEVEL SHIFT DIODE CLAMPING THE VOLTAGE AT SAID NODE AT V1 VOLTS WHEN THE TRANSISTOR IS IN SATURATION; AND A NUMBER OF OUTPUT DIODES EACH HAVING ONE ELECTRODE INTEGRAL WITH SAID COLLECTOR AND BEING POLED TO PASS COLLECTOR CURRENT, THE VOLTAGE AT THE OTHER ELECTRODE OF EACH OF SAID OUTPUT DIODES HAVING A VALUE /V2/$/V1/ WHEN THE TRANSISTOR IS IN SATURATION; A SIGNAL LINE HAVING ITS OUTPUT END CONNECTED AT SAID INPUT NODE AND HAVING A FINITE CHARACTERISTIC IMPEDANCE ZO; A PLURALITY OF SWITCH MEANS EACH BEING CONNECTED TO A DIFFERENT TAP ALONG THE LENGTH OF SAID SIGNAL LINE AND EACH BEING SELECTIVELY OPERABLE BETWEEN AN OPEN CONDITION AND A CLOSED CONDITION IN WHICH A VOLTAGE OF V2 VOLTS IS APPLIED AT THE RESPECTIVE TAP; AND SAID BIAS MEANS SUPPLYING A CURRENT
Claim 2
Dependent Claim
213 words
THE COMBINATION COMPRISING: A FIRST LOGIC CIRCUIT INCLUDING A TRANSISTOR CONNECTED IN THE GROUNDED EMITTER CONFIGURATION AND HAVING A BASE AND A COLLECTOR; AN INPUT NODE; AT LEAST ONE LEVEL SHIFT DIODE CONNECTED BETWEEN THE INPUT NODE AND THE BASE AND HAVING A DIFFUSION CAPACITANCE THAT VARIES AS A FUNCTION OF DIODE CURRENT, SAID DIODE ALSO HAVING AN OPERATING REGION OF SUBSTANTIALLY CONSTANT VOLTAGE; BIAS MEANS CONNECTED BETWEEN SAID NODE ND CIRCUIT GROUND FOR NORMALLY BIASING THE TRANSISTOR INTO SATURATION, SAID LEVEL SHIFT DIODE CLAMPING THE VOLTAGE AT SAID NODE AT V1 VOLTS WHEN THE TRANSISTOR IS IN SATURATION; AND A NUMBER OF OUTPUT DIODES EACH HAVING ONE ELECTRODE INTEGRAL WITH SAID COLLECTOR AND BEING POLED TO PASS COLLECTOR CURRENT, THE VOLTAGE AT THE OTHER ELECTRODE OF EACH OF SAID OUTPUT DIODES HAVING A VALUE /V2/$/V1/ WHEN THE TRANSISTOR IS IN SATURATION; A SIGNAL LINE HAVING ITS OUTPUT END CONNECTED AT SAID INPUT NODE AND HAVING A FINITE CHARACTERISTIC IMPEDANCE ZO; A PLURALITY OF SWITCH MEANS EACH BEING CONNECTED TO A DIFFERENT TAP ALONG THE LENGTH OF SAID SIGNAL LINE AND EACH BEING SELECTIVELY OPERABLE BETWEEN AN OPEN CONDITION AND A CLOSED CONDITION IN WHICH A VOLTAGE OF V2 VOLTS IS APPLIED AT THE RESPECTIVE TAP; AND SAID BIAS MEANS SUPPLYING A CURRENT
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1969-09-19 | 1970-03-21 | 1970-09-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1973-09-19 | 1974-03-21 | 1974-09-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1977-09-19 | 1978-03-21 | 1978-09-20 | $7700.00 | Window Closed / Lapsed |