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US3271674A Expired / Lapsed US ⏱️ 0.0 years remaining

Circuit variance analyzer including scanner controlled parameter variation of the test circuit

Assignee: TDK Micronas GmbH
•
Filing: 1961-04-28
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Granted: 1966-09-06
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Expires: 1981-04-28
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Abstract

No abstract record available.

Inventors

  • 👤 Kenneth R Horning
  • 👤 Massey John

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-22 23:25
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/28; G01R31/316; G01R31/3161

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 115 words
A CIRCUIT VARIANCE ANALYZER FOR DETECTING VARIATIONS IN THE OUTPUT OF A CIRCUIT UNDER TEST, COMPRISING A STANDARD CIRCUIT HAVING OUTPUT CHARACTERISTICS CORRESPONDING TO THE DESIRED OUTPUT CHARACTERISTICS OF SAID CIRCUIT UNDER TEST, SCANNING MEANS DRIVEN AT A RELATIVELY LOW RATE FOR PROVIDING PREDICTABLE COMBINATIONS OF SCANNING OUTPUTS, SELECTING MEANS OPERATED RESPONSIVE TO SAID COMBINATIONS OF OUTPUTS OF SAID SCANNING MEANS FOR SELECTING SUCCESSIVE COMBINATIONS OF CONTROL CIRCUITRY, SAID CONTROL CIRCUITRY OPERATED TO VARY THE PARAMETER OF SAID CIRCUIT UNDER TEST, MEANS DRIVEN AT A RELATIVELY HIGH RATE FOR SIMULTANEOUSLY, REPEATEDLY ENERGIZING THE INPUT OF SAID STANDARD CIRCUIT AND SAID CIRCUIT UNDER TEST TO CAUSE SAID CIRCUITS TO PRODUCE OUTPUTS, COMPARATOR MEANS OPERATED RESPONSIVE TO
Claim 2
Dependent Claim 115 words
A CIRCUIT VARIANCE ANALYZER FOR DETECTING VARIATIONS IN THE OUTPUT OF A CIRCUIT UNDER TEST, COMPRISING A STANDARD CIRCUIT HAVING OUTPUT CHARACTERISTICS CORRESPONDING TO THE DESIRED OUTPUT CHARACTERISTICS OF SAID CIRCUIT UNDER TEST, SCANNING MEANS DRIVEN AT A RELATIVELY LOW RATE FOR PROVIDING PREDICTABLE COMBINATIONS OF SCANNING OUTPUTS, SELECTING MEANS OPERATED RESPONSIVE TO SAID COMBINATIONS OF OUTPUTS OF SAID SCANNING MEANS FOR SELECTING SUCCESSIVE COMBINATIONS OF CONTROL CIRCUITRY, SAID CONTROL CIRCUITRY OPERATED TO VARY THE PARAMETER OF SAID CIRCUIT UNDER TEST, MEANS DRIVEN AT A RELATIVELY HIGH RATE FOR SIMULTANEOUSLY, REPEATEDLY ENERGIZING THE INPUT OF SAID STANDARD CIRCUIT AND SAID CIRCUIT UNDER TEST TO CAUSE SAID CIRCUITS TO PRODUCE OUTPUTS, COMPARATOR MEANS OPERATED RESPONSIVE TO

References Cited (Backward Citations)

US1309235A Cited
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US1131104A Cited
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US2878313A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1969-09-05 1970-03-07 1970-09-06 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1973-09-05 1974-03-07 1974-09-06 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1977-09-05 1978-03-07 1978-09-06 $7700.00 Window Closed / Lapsed

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