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US3270335A Expired / Lapsed US ⏱️ 0.0 years remaining

High speed delta encoder

Assignee: BAE Systems Space & Mission Systems Inc
•
Filing: 1963-09-18
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Granted: 1966-08-30
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Expires: 1983-09-18
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Abstract

No abstract record available.

Inventors

  • 👤 Kenneth R Hackett

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 06:46
CPC Classifications
H; H03; H03M; H03M1/00; H03M3/00; H03M3/02; H03M1/12; H03M1/14

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 122 words
A HIGH SPEED DELTA ENCODER COMPRISING AN INPUT AMPLIFIER CIRCUIT, AN ADDER CIRCUIT CONNECTED TO RECEIVE THE OUTPUT FROM SAID INPUT AMPLIFIER CIRCUIT, AN AVALANCHE MODE BINARY DECISION CIRCUIT INCLUDING A SILICON TRANSISTOR OPERATING IN THE AVALANCHE MODE CONNECTED TO RECEIVE THE OUTPUT FROM SAID ADDER CIRCUIT, AN INTEGRATING CIRCUIT CONNECTED TO RECEIVE THE OUTPUT FROM SAID BINARY DECISION CIRCUIT AND CONNECTED TO SUPPLY AN OUTPUT TO SAID ADDER CIRCUIT TO ESTABLISH A FEEDBACK LOOP, CLOSK PULSE GENERATOR MEANS CONNECTED TO SAID BINARY DECISION CIRCUIT AND TO SAID INTEGRATING CIRCUIT, AND AN OUTPUT AMPLIFIER CIRCUIT CONNECTED TO RECEIVE THE OUTPUT FROM SAID BINARY DECISION CIRCUIT FOR TRANSMITTING THEREFROM A DIGITAL OUTPUT CONVERTED FROM AN ANALOG INPUT FED TO SAID INPUT AMPLIFIER CIRCUIT.
Claim 2
Dependent Claim 122 words
A HIGH SPEED DELTA ENCODER COMPRISING AN INPUT AMPLIFIER CIRCUIT, AN ADDER CIRCUIT CONNECTED TO RECEIVE THE OUTPUT FROM SAID INPUT AMPLIFIER CIRCUIT, AN AVALANCHE MODE BINARY DECISION CIRCUIT INCLUDING A SILICON TRANSISTOR OPERATING IN THE AVALANCHE MODE CONNECTED TO RECEIVE THE OUTPUT FROM SAID ADDER CIRCUIT, AN INTEGRATING CIRCUIT CONNECTED TO RECEIVE THE OUTPUT FROM SAID BINARY DECISION CIRCUIT AND CONNECTED TO SUPPLY AN OUTPUT TO SAID ADDER CIRCUIT TO ESTABLISH A FEEDBACK LOOP, CLOSK PULSE GENERATOR MEANS CONNECTED TO SAID BINARY DECISION CIRCUIT AND TO SAID INTEGRATING CIRCUIT, AND AN OUTPUT AMPLIFIER CIRCUIT CONNECTED TO RECEIVE THE OUTPUT FROM SAID BINARY DECISION CIRCUIT FOR TRANSMITTING THEREFROM A DIGITAL OUTPUT CONVERTED FROM AN ANALOG INPUT FED TO SAID INPUT AMPLIFIER CIRCUIT.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1969-08-29 1970-02-28 1970-08-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1973-08-29 1974-02-28 1974-08-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1977-08-29 1978-02-28 1978-08-30 $7700.00 Window Closed / Lapsed

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