US3263303A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of making modules
Assignee: RCA Corp
•
Filing: 1962-04-09
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Granted: 1966-08-02
•
Expires: 1982-04-09
Abstract
No abstract record available.
Inventors
- 👤 William L Oates
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 03:00
CPC Classifications
H; H05; H05K; H05K1/00; H05K1/02; H05K1/14; H05K1/144; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49169; Y10T29/49171; Y10T29/49172; Y10T29/4981
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
150 words
A METHOD OF MAKING A MODULE COMPRISED OF A PLURALITY OF CIRCUIT WAFERS EACH HAVING AT LEAST ONE CIRCUIT COMPONENT THEREON AND SUBSTANTIALLY SIMILAR PERIPHERY AND METALIZED TERMINALS ON SAID PERIPHERY, FIRST STRAIGHT RISER WIRES, SECOND STRAIGHT RISER WIRES WITH HOOKED ENDS, AND SOLUBLE SPACERS OF INSULATING MATERIAL, SAID METHOD COMPRISING THE STEPS OF: (A) DISPOSING SAID FIRST STRAIGHTR RISER WIRES IN SUBSTANTIALLY PARALLEL ALIGNMENT TO FORM A CAGE-LIKE STRUCTURE, OPEN AT THE TOP, AND ADAPTED TO RECEIVE A STACK OF WAFERS SNUGLY THEREIN THROUGH SAID OPEN TOP, (B) INTRODUCING SAID CIRCUIT WAFERS AND SAID SPACERS THROUGH SAID OPEN TOP IN INTERLEAVED RELATION TO FORM A STACK THEREOF WITHIN SAID STRUCTURE WITH SAID FIRST RISER WIRES ADJACENT TO CERTAIN ONES OF SAID TERMINALS, (C) DISPOSING AT LEAST TWO OF SAID SECOND STRAIGHT RISER WIRES WITH THEIR HOOKED ENDS ENGAGING THE UPPER SURFACE OF THE TOPMOST CIRCUIT WAFER IN SAID INTERLEAVED
Claim 2
Independent Claim
150 words
A METHOD OF MAKING A MODULE COMPRISED OF A PLURALITY OF CIRCUIT WAFERS EACH HAVING AT LEAST ONE CIRCUIT COMPONENT THEREON AND SUBSTANTIALLY SIMILAR PERIPHERY AND METALIZED TERMINALS ON SAID PERIPHERY, FIRST STRAIGHT RISER WIRES, SECOND STRAIGHT RISER WIRES WITH HOOKED ENDS, AND SOLUBLE SPACERS OF INSULATING MATERIAL, SAID METHOD COMPRISING THE STEPS OF: (A) DISPOSING SAID FIRST STRAIGHTR RISER WIRES IN SUBSTANTIALLY PARALLEL ALIGNMENT TO FORM A CAGE-LIKE STRUCTURE, OPEN AT THE TOP, AND ADAPTED TO RECEIVE A STACK OF WAFERS SNUGLY THEREIN THROUGH SAID OPEN TOP, (B) INTRODUCING SAID CIRCUIT WAFERS AND SAID SPACERS THROUGH SAID OPEN TOP IN INTERLEAVED RELATION TO FORM A STACK THEREOF WITHIN SAID STRUCTURE WITH SAID FIRST RISER WIRES ADJACENT TO CERTAIN ONES OF SAID TERMINALS, (C) DISPOSING AT LEAST TWO OF SAID SECOND STRAIGHT RISER WIRES WITH THEIR HOOKED ENDS ENGAGING THE UPPER SURFACE OF THE TOPMOST CIRCUIT WAFER IN SAID INTERLEAVED
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1969-08-01 | 1970-01-31 | 1970-08-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1973-08-01 | 1974-01-31 | 1974-08-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1977-08-01 | 1978-01-31 | 1978-08-02 | $7700.00 | Window Closed / Lapsed |