Low dissipation power supply

Claim 1

IN A LOW DISSIPATION POWER SUPPLY INCLUDING INPUT TERMINALS FOR RECEIVING AN ALTERNATING CURRENT, A TRANSFORMER HAVING A PRIMARY WINDING CONNECTED TO SAID INPUT TERMINALS AND A CENTER TAPPED SECONDARY WINDING, A FULL WAVE RECTIFIER CONNECTED WITH SAID SECONDARY WINDING TO RECTIFY SAID ALTERNATING CURRENT TO PROVIDE A RECTIFIED OUTPUT VOLTAGE, A FIRST CAPACITANCE, A VOLTAGE REGULATOR INCLUDING A SERIES REGULATOR TRANSISTOR, FIRST MEANS CONNECTING SAID FIRST CAPACITANCE TO SAID VOLTAGE REGULATOR, SECOND MEANS CONNECTING SAID VOLTAGE REGULATOR TO OUTPUT TERMINALS TO PROVIDE A REGULATED OUTPUT DIRECT CURRENT VOLTAGE, THE CENTER TAP OF SAID SECONDARY WINDING SERVING AS A COMMON VOLTAGE CONDUCTOR AND BEING CONNECTED TO ONE OF SAID OUTPUT TERMINALS, A POTENTIAL DIVIDER CONNECTED ACROSS SAID OUTPUT TERMINALS AND HAVING AN INTERMEDIATE TERMINAL, THE IMPROVEMENT COMPRISING A FIRST SEMICONDUCTOR DEVICE CONNECTED IN SERIES BETWEEN SAID RECTIFIER AND SAID FIRST MEANS WHEREBY SAID FIRST SEMICONDUCTOR DEVICE, SAID FIRST MEANS AND SAID SERIES REGULATOR TRANSISTOR ARE CONNECTED IN SERIES BETWEEN SAID RECTIFIER AND ONE OF SAID OUTPUT TERMINALS, AND SAID FIRST CAPACITANCE IS CONNECTED BETWEEN THE JUNCTION OF SAID FIRST SEMICONDUCTOR DEVICE AND SAID FIRST MEANS AND THE COMMON VOLTAGE CONDUCTOR, SAID FIRST SEMICONDUCTOR DEVICE OPERATING IN AN IN-PHASE RELATIONSHIP WITH RESPECT TO THE FREQUENCY OF SAID ALTERNATING CURRENT, SECOND AND THIRD SEMICONDUCTOR DEVICES CONNECTED IN SERIES, A FOURTH SEMICONDUCTOR DEVICE COUPLED WITH SAID FIRST SEMICONDUCTOR DEVICE AND COUPLED WITH, AND UNDER THE CONTROL OF, SAID SECOND AND THIRD SEMICONDUCTOR DEVICES, A FIRST RESISTANCE CONNECTED BETWEEN SAID RECTIFIER AND SAID SECOND SEMICONDUCTIVE DEVICE TO APPLY A CONTROL VOLTAGE THERETO, A SECOND RESISTANCE CONNECTED BETWEEN SAID COMMON VOLTAGE CONDUCTOR AND SAID SECOND SEMICONDUCTIVE DEVICE TO APPLY A CONTROL VOLTAGE THERETO, A THIRD RESISTANCE CONNECTED FROM THE JUNCTION OF SAID FIRST SEMICONDUCTIVE AND FIRST MEANS TO SAID SECOND SEMICONDUCTIVE DEVICE TO APPLY A CONTROL VOLTAGE THERETO, A FOURTH RESISTANCE AND A SECOND CAPACITANCE CONNECTED IN SERIES BETWEEN SAID RECTIFIER AND SAID COMMON VOLTAGE CONDUCTOR, FIFTH AND SIXTH SEMICONDUCTOR DEVICES CONNECTED IN SERIES ACROSS A JUNCTION OF SAID SERIES REGULATOR TRANSISTOR, A CONTROL CIRCUIT CONNECTED WITH SAID COMMON VOLTAGE CONDUCTOR, SAID POTENTIAL DIVIDER INTERMEDIATE TERMINAL AND SAID SIXTH SEMICONDUCTOR DEVICE TO CONTROL THE OPERATION OF SAID SERIES REGULATOR TRANSISTOR, SAID FIFTH SEMICONDUCTOR DEVICE OPERATING IN CONJUNCTION WITH SAID SERIES REGULATOR TRANSISTOR AND SAID SIXTH SEMICONDUCTOR DEVICE TO MAINTIN THE OUTPUT VOLTAGE OF THE POWER SUPPLY AT A PREDETERMINED FIXED LEVEL BELOW THE VOLTAGE OF SAID FIRST CAPACITANCE WHEN THE VOLTAGE OF SAID FIRST CAPACITANCE IS BELOW A PREDETERMINED LEVEL TO PREVENT SAID FIRST SEMICONDUCTOR DEVICE FROM TURNING ON OR REMAINING ON FOR A SUFFICIENT PERIOD OF TIME TO KEEP SAID FIRST CAPACITANCE FROM BECOMING FULLY CHARGED WHEN SEVERE LOADS ARE APPLIED TO SAID POWER SUPPLY.