Sum and difference circuit

Claim 1

A CIRCUIT FOR ACCEPTING FIRST AND SECOND INPUT SIGNALS TO DEVELOP TWO OUTPUT SIGNALS THEREFROM ONE OF WHICH IS PROPORTIONAL TO THE APPROXIMATE ARITHMETIC SUM OF AND THE OTHER OF WHICH IS PROPORTIONAL TO THE APPROXIMATE ARITHMETIC DIFFERENCE BETWEEN THE TWO INPUT SIGNALS, COMPRISING: FIRST AND SECOND INPUT MEANS ADAPTED TO HAVE SUCH FIRST AND SECOND INPUT SIGNALS RESPECTIVELY APPLIED THERETO, A PAIR OF OUTPUT MEANS, A SIGNAL DUPLICATION NETWORK INTERCONNECTING SAID FIRST INPUT MEANS WITH SAID PAIR OF OUTPUT MEANS FOR DELIVERING TO EACH A DUPLICATE OF SUCH FIRST INPUT SIGNAL, A PAIR OF TRANSISTORS EACH HAVING AN EMITTER AND COLLECTOR AND ONE THEREOF HAVING A BASE, SAID SECOND INPUT MEANT BEING CONNECTED TO THE BASE OF SAID ONE TRANSISTOR FOR APPLYING SUCH SECOND INPUT SIGNAL THERETO, AND A NETWORK COUPLING THE EMITTERS OF SAID TRANSISTORS SO THAT SUCH SECOND INPUT SIGNAL APPLIED TO THE BASE OF SAID ONE TRANSISTOR IS DUPLICATED AT THE EMITTER OF THE OTHER TRANSISTOR, SAID PAIR OF OUTPUT MEANS ALSO BEING RESPECTIVELY CONNECTED WITH THE COLLECTORS OF SAID TRANSISTORS SO THAT A PHASE-INVERTED AMPLIFIED REPRODUCTION OF SUCH SECOND INPUT SIGNAL IS DELIVERED TO THE OUTPUT MEANS CONNECTED TO SAID ONE TRANSISTOR AND AN AMPLIFIED DUPLICATE OF SUCH SECOND INPUT SIGNAL IS DELIVERED TO THE OTHER OUTPUT MEANS, WHEREBY THE RESULTANT APPEARING AT ONE OF SAID OUTPUT MEANS IS ESSENTIALLY THE SUM OF THE TWO SIGNALS DELIVERED THERETO AND THE RESULTANT OUTPUT APPEARING AT THE OTHER OF SAID OUTPUT MEANS IS ESSENTIALLY THE DIFFERENCE BETWEEN THE TWO OUTPUTS DELIVERED THERETO.