Current driver for core memory apparatus

Claim 1

A HIGH-SPEED CURRENT HAVING APPARATUS COMPRISING AN INDUCTOR HAVING FIRST AND SECOND TERMINALS; A TRANSISTOR HAVING A COLLECTOR, AN EMITTER AND A BASE, SAID EMITTER AND COLLECTOR BEING CONNECTED BETWEEN SAID SECOND TERMINAL OF SAID INDUCTOR AND A REFERENCE JUNCTION MAINTAINED AT A SUBSTANTIALLY CONSTANT REFERENCE POTENTIAL LEVEL AND SAID BASE BEING BIASED TO ALLOW SATURATION CURRENT TO FLOW THROUGH SAID TRANSISTOR; MEANS CONNECTED TO SAID FIRST TERMINAL OF SAID INDUCTOR FOR NORMALLY MAINTAINING A SUBSTANTIALLY CONSTANT CURRENT FLOW THERETHROUGH; AN ENHANCEMENT-TYPE DIODE CONNECTED BETWEEN SAID SECOND TERMINAL OF SAID INDUCTOR AND A FIRST JUNCTION, SAID ENHANCEMENTTYPE DIODE BEING POLED IN A DIRECTION TO BE BACK-BIASED UPON THE INTERRUPTION OF CURRENT FLOW THROUGH SAID INDUCTOR; MEANS CONNECTED TO SAID FIRST JUNCTION FOR LIMITING VOLTAGE EXCURSIONS THEREAT TO A PREDETERMINED POTENTIAL LEVEL AND FOR PRODUCING A RESIDUAL CURRENT FLOW IN A FORWARD DIRECTION THROUGH SAID ENHANCEMENT-TYPE DIODE; A UTILIZATION DEVICE TO BE DRIVEN CONNECTED BETWEEN SAID SECOND TERMINAL OF SAID INDUCTOR AND A SECOND JUNCTION MAINTAINED AT A POTENTIAL LEVEL CAPABLE OF BACKBIASING SAID ENHANCEMENT-TYPE DIODE; AND MEANS CONNECTED TO SAID BASE OF SAID TRANSISTOR FOR INTERRUPTING CURRENT FLOW THERETHROUGH THEREBY TO INITIATE A DRIVING CURRENT THROUGH SAID UTILIZATION DEVICE.