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US3249762A Expired / Lapsed US ⏱️ 0.0 years remaining

Binary logic modules

Assignee: Cutler Hammer Inc
•
Filing: 1961-10-09
•
Granted: 1966-05-03
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Expires: 1981-10-09
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Abstract

No abstract record available.

Inventors

  • 👤 Paul M Kintner

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 05:10
CPC Classifications
G; G11; G11C; G11C19/00; G11C19/28; H; H03; H03K; H03K17/00; H03K17/18; H03K19/00; H03K19/02; H03K19/08; H03K19/082; H03K19/09; H03K3/00; H03K3/02; H03K3/26; H03K3/28; H03K3/281; H03K3/286; H03K3/288

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 194 words
A BINARY TRANSISTOR LOGIC MODULATOR UNIT COMPRISING A PAIR OF POWER SUPPLY TERMINALS, FIRST AND SECOND TRANSISTORS OF OPPOSITE TYPES, THE SECOND TRANSISTOR HAVING THE EMITTER THEREOF DIRECT-CONNECTED TO ONE POWER SUPPLY TERMINAL AND THE COLLECTOR THEREOF CONNECTED THROUGH A LOAD RESISTOR TO THE OTHER POWER SUPPLY TERMINAL, AN INPUT CIRCIUT TO THE BASE OF THE FIRST TRANSISTOR AND AN OUTPUT CIRCUIT FROM THE COLLECTOR OF THE SECOND TRANSISTOR, AN INCANDESCENT LAMP CONNECTED ACROSS THE COLLECTOR RESISTOR OF THE SECOND TRANSISTOR, THE FIRST TRANSISTOR BEING CONNECTED AS AN EMITTER-FOLLOWER WITH THE EMITTER THEREOF CONNECTED THROUGH A RESISTOR TO SAID OTHER POWER SUPPLY TERMINAL AND THE COLLECTOR THEREOF DIRECT-CONNECTED TO SAID ONE POWER SUPPLY TERMINAL, A DIODE CONNECTED BETWEEN THE EMITTER OF THE FIRST TRANSISTOR AND THE BASE OF THE SECOND, A RELATIVELY LOW RESISTOR CONNECTED BETWEEN THE BASE AND EMITTER OF THE SECOND TRANSISTOR, THE DIODE BEING POLED TO PASS CURRENT TO SWITCH THE SECOND TRANSISTOR ON AND OFF WHEN THE FIRST TRANSISTOR IS SUPPLIED CORRESPONDING SWITCHING INPUT SIGNALS, THE DIODE PROVIDING A RELATIVELY HIGH RESISTANCE FOR THE OFF CONDITION OF THE SECOND TRANSISTOR AND A RELATIVELY LOW RESISTANCE FOR THE ONE CONDITION THEREOF.
Claim 2
Dependent Claim 194 words
A BINARY TRANSISTOR LOGIC MODULATOR UNIT COMPRISING A PAIR OF POWER SUPPLY TERMINALS, FIRST AND SECOND TRANSISTORS OF OPPOSITE TYPES, THE SECOND TRANSISTOR HAVING THE EMITTER THEREOF DIRECT-CONNECTED TO ONE POWER SUPPLY TERMINAL AND THE COLLECTOR THEREOF CONNECTED THROUGH A LOAD RESISTOR TO THE OTHER POWER SUPPLY TERMINAL, AN INPUT CIRCIUT TO THE BASE OF THE FIRST TRANSISTOR AND AN OUTPUT CIRCUIT FROM THE COLLECTOR OF THE SECOND TRANSISTOR, AN INCANDESCENT LAMP CONNECTED ACROSS THE COLLECTOR RESISTOR OF THE SECOND TRANSISTOR, THE FIRST TRANSISTOR BEING CONNECTED AS AN EMITTER-FOLLOWER WITH THE EMITTER THEREOF CONNECTED THROUGH A RESISTOR TO SAID OTHER POWER SUPPLY TERMINAL AND THE COLLECTOR THEREOF DIRECT-CONNECTED TO SAID ONE POWER SUPPLY TERMINAL, A DIODE CONNECTED BETWEEN THE EMITTER OF THE FIRST TRANSISTOR AND THE BASE OF THE SECOND, A RELATIVELY LOW RESISTOR CONNECTED BETWEEN THE BASE AND EMITTER OF THE SECOND TRANSISTOR, THE DIODE BEING POLED TO PASS CURRENT TO SWITCH THE SECOND TRANSISTOR ON AND OFF WHEN THE FIRST TRANSISTOR IS SUPPLIED CORRESPONDING SWITCHING INPUT SIGNALS, THE DIODE PROVIDING A RELATIVELY HIGH RESISTANCE FOR THE OFF CONDITION OF THE SECOND TRANSISTOR AND A RELATIVELY LOW RESISTANCE FOR THE ONE CONDITION THEREOF.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1969-05-02 1969-11-01 1970-05-03 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1973-05-02 1973-11-01 1974-05-03 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1977-05-02 1977-11-01 1978-05-03 $7700.00 Window Closed / Lapsed

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