Ratchet memory circuit and sampling system employing such circuit

Claim 1

A SAMPLING CIRCUIT FOR REPRODUCING THE WAVE FORM OF REPETITIVE, HIGH FREQUENCY SIGNALS AT A LOWER FREQUENCY, COMPRISING: A MEMORY CIRCUIT INCLUDING AN INTEGRATOR AMPLIFIER HAVING A MEMORY CAPACITOR CONNECTED AS A FEEDBACK FROM THE OUTPUT TO THE INPUT END OF SAID INTEGRATOR AMPLIFIER, AND INCLUDING A COUPLING CAPACITOR CONNECTED TO SAID INPUT OF SAID INTEGRATOR AMPLIFIER AND SAID MEMORY CAPACITOR; A MEMORY GATE CONNECTED BETWEEN SAID COUPLING CAPACITOR AND SAID INPUT OF SAID INTEGRATOR AMPLIFIER TO CONTROL THE CHARGING AND DISCHARGING OF SAID MEMORY CAPACITOR; MEANS FOR NORMALLY BIASING SAID MEMORY GATE NONCONDUCTING AND FOR APPLYING A GATING PULSE TO SAID MEMORY GATE TO SENDER SAID GATE CONDUCTING FOR A TIME DETERMINED BY THE WIDTH OF SAID GATING PULSE; AND SAMPLING MEANS INCLUDING SAMPLING GATE MEANS FOR OBTAINING SAMPLE PULSES OF DIFFERENT PORTIONS OF THE WAVEFORM OF A REPETITIVE HIGH FREQUENCY INPUT SIGNAL, EACH SAMPLE PULSE BEING TAKEN FROM A DIFFERENT ONE OF SUCCESSIVE INPUT SIGNALS, AND FEEDBACK MEANS FOR COMPARING THE OUTPUT VOLTAGE OF SAID INTEGRATING AMPLIFIER WITH THE VOLTAGE OF SAMPLE PULSES TO PRODUCE DIFFERENCE SIGNALS AND FOR TRANSMITTING SAID DIFFERENCE SIGNALS THROUGH SAID COUPLING CAPACITOR WHEN SAID GATE IS CONDUCTING TO STORE SAID DIFFERENCE SIGNALS ON THE MEMORY CAPACITOR OF SAID INTEGRATING AMPLIFIER AND PRODUCE A LOW FREQUENCY OUTPUT SIGNAL HAVING A WAVE FORM SIMILAR TO THAT OF SAID INPUT SIGNAL.