Control circuit for an a. c. power unit

Claim 1

IN COMBINATION IN A LIGHT DIMMING A.C. POWER UNIT FOR AN INCANDESCENT LAMP LOAD WHEREIN THE MAGNITUDE OF AN INPUT VOLTAGE DETERMINES LAMP BRILLIANCE: (A) POWER RECTIFIERS CONNECTED IN A FULL WAVE D.C. POLARIZING BRIDGE CONFIGURATION WITH THE A.C. TERMINALS THEREOF ADAPTED TO BE CONNECTED IN SERIES WITH AN INCANDESCENT LAMP LOAD BETWEEN THE TWO SIDES OF AN A.C. POWER LINE, (B) AT LEAST TWO SILICON CONTROLLED POWER RECTIFIERS CONNECTED IN PARALLEL AND IN THE SAME SENSE BETWEEN THE D.C. TERMINALS OF SAID BRIDGE, (C) A SATURATING FILTER REACTOR WITH A CLOSED IRON CORE HAVING A SOFT HYSTERESIS LOOP AND WITH A WINDING OF LESS THAN FIFTY TURNS, SAID SATURATING FILTER REACTOR BEING CONNECTED IN SERIES BETWEEN ONE SIDE OF THE LINE AND SAID BRIDGE, SAID REACTOR BEING CONSTRUCTED AND ARRANGED TO HAVE A HIGH INITIAL IMPEDANCE SO AS TO LIMIT DURING AND IMMEDIATELY AFTER THE FIRING OF SAID SILICON CONTROLLED POWER RECTIFIERS THE RATE OF CURRENT RISE IN SAID SILICON CONTROLLED POWER RECTIFIERS AND TO THEREAFTER STILL POSSESS CONSIDERABLE RELUCTANCE SO AS TO REDUCE THE RATE OF VOLTAGE AND CURRENT RISE IN SAID SILICON CONTROLLED POWER RECTIFIERS THUS LIMITING THE SHOCK OF FAST RISING CURRENT THAT WOULD OTHERWISE CAUSE AUDIBLE LAMP FILAMENT NOISE AND OBJECTIONABLE HARMONICS AT RADIO FREQUENCY, (D) AN INPUT CIRCUIT INCLUDING SIGNAL INPUT TERMINALS ACROSS WHICH AN INPUT SIGNAL VOLTAGE OF CONTROLLABLE MAGNITUDE IS IMPRESSED FOR DETERMINING LAMP BRILLIANCE, AN IMPEDNACE AND A POTENTIOMETER CONNECTED IN SERIES ACROSS SAID INPUT TERMINALS, A FIRST PNP TRANSISTOR, SAID IMPEDANCE BEING CONNECTED IN THE BASE-TO-COLLECTOR CIRCUIT OF SAID FIRST TRANSISTOR, THE INPUT SIGNAL DEVELOPING A VOLTAGE ACROSS THE IMPEDANCE THAT REVERSE BIASES THE BASE-TO-COLLECTOR JUNCTION OF THE FIRST TRANSISTOR SO THAT SAID FIRST TRANSISTOR FUNCTIONS AS AN EMITTER FOLLOWER, A SIGNAL DELAY FIRST CAPACITOR CONNECTED IN THE EMITTER-TO-COLLECTOR CIRCUIT OF THE FIRST TRANSISTOR, AND A FIRST VARIABLE RESISTOR IN THE EMITTER CIRCUIT OF THE FIRST TRANSISTOR, (E) A FIRING CIRCUIT FOR SAID SILICON CONTROLLED POWER RECTIFIERS, SAID FIRING CIRCUIT BEING ARRANGED TO BE CONTROLLED BY SAID INPUT CIRCUIT AND COMPRISING A PULSATING D.C. SOURCE, A SECOND PNP TRANSISTOR, THE EMITTERTO-BASE OF THE SECOND TRANSISTOR BEING CONNECTED ACROSS SAID PULSATING D.C. SOURCE, THE EMITTER-TOCOLLECTOR CIRCUIT OF THE FIRST TRANSISTOR BEING CONNECTED ACROSS THE EMITTER-TO-BASE CIRCUIT OF THE SECOND TRANSISTOR SO THAT THE EMITTER-TO-COLLECTOR JUNCTIONS OF THE SECOND TRANSISTOR PROVIDES A VARIABLE RESISTANCE RESPONSIVE TO THE SIGNAL INPUT, A SECOND CAPACITOR CONNECTED FOR CHARGING ACROSS THE PULSATING D.C. SOURCE IN SERIES WITH THE EMITTER-TO-COLLECTOR CIRCUIT OF THE SECOND TRANSISTOR, A FIRST DOUBLE-BASED DIODE HAVING ITS BASES CONNECTED ACROSS THE PULSATING D.C. SOURCE AND ITS EMITTER CONNECTED TO THE COLLECTOR OF THE SECOND TRANSISTOR SO THAT THE FIRST DOUBLE-BASED DIODE AND THE SECOND CAPACITOR ACT AS A RELAXATION OSCILLATOR DISCHARGING EACH TIME THE CHARGE ON THE SECOND CAPACITOR REACHES THE PEAK POINT VOLTAGE OF THE FIRST DOUBLE-BASED DIODE, AND A PULSE TRANSFORMER HAVING A PRIMARY WINDING CONNECTED IN SERIES WITH THE DOUBLE BASES AND HAVING SECONDARY WINDINGS CONNECTED TO THE CONTROL TERMINALS OF THE SILICON CONTROLLED POWER RECTIFIERS SO THAT SAID OSCILLATOR WILL PROVIDE A FIRING PULSE THE PHASE OF WHICH IS VARIABLE IN RESPONSE TO THE VARIATION IN THE SIGNAL IMPRESSED BY THE INPUT CIRCUIT ON THE FIRING CIRCUIT, (F) SAID PULSATING D.C. SOURCE COMPRISING MEANS TO PROVIDE AN A.C. CONTROL VOLTAGE THAT LEADS THE A.C. POWER VOLTAGE BY A FIXED AMOUNT BETWEEN ABOUT 10* AND ABOUT 30*, MEANS TO RECTIFY SAID A.C. CONTROL VOLTAGE, AND MEANS TO CLIP SAID RECTIFIED VOLTAGE, (G) AN OVERCURRENT SENSING CIRCUIT COMPRISING MEANS RESPONSIVE TO THE OUTPUT CURRENT FROM THE POLARIZING BRIDGE, SAID OVERCURRENT SENSING CIRCUIT FURTHER INCLUDING AND INDUCTANCE MEANS FED BY THE RESPONSIVE MEANS TO STORE ENERGY AND RENDER SAID OVERCURRENT SENSING CIRCUIT SENSITIVE TO OVERCURRENT AT LESS THAN A FULL CONDUCTION ANGLE, SAID OVERCURRENT SENSING CIRCUIT ALSO INCLUDING A THIRD CAPACITOR TO ABSORB ENERGY DURING THE PERIOD OF CURRENT IN-RUSH TO A COLD INCANDESCENT LAMP FILAMENT SO AS TO RENDER THE SENSING CIRCUIT INSENSITIVE TO SAID IN-RUSH DURING SUCH PERIOD, AND SAID OVERCURRENT SENSING CIRCUIT INCLUDING A SCHMITT TRIGGER HAVING ITS INPUT CONNECTED TO SAID RESPONSIVE MEANS, (H) A DISARMING CIRCUIT FOR THE FIRING CIRCUIT, SAID DISARMING CIRCUIT COMPRISING SAID THIRD CAPACITOR CONNECTED TO THE OUTPUT OF THE SCHMITT TRIGGER SO AS TO HAVE INTERMITTENTLY APPLIED THERETO THE PULSE OUTPUTS OF SAID TRIGGER, MEANS TO SUPPLY A SMOOTH D.C. VOLTAGE, A SECOND DOUBLE-BASED DIODE HAVING ITS BASES CONNECTED ACROSS THE SMOOTH D.C. VOLTAGE AND ITS EMITTER CONNECTED TO THE THIRD CAPACITOR SO AS TO GO INTO A NEGATIVE RESISTANCE STATE WHEN THE THIRD CAPACITOR IS CHARGED BY THE SCHMITT TRIGGER TO THE PEAK POINT VOLTAGE OF THE SECOND DOUBLE-BASED DIODE, SAID PEAK POINT VOLTAGE BEING SUCH THAT IT IS ATTAINED UPON THE PRESENCE OF AN OVERCURRENT CONDITION IN THE OUTPUT CURRENT FROM THE POLARIZING BRIDGE EXCEPT FOR THE IN-RUSH CURRENT TO A COLD INCANDESCENT LAMP LOAD TO WHICH THE SENSING CIRCUIT IS RENDERED INSENSITIVE BY THE THIRD CAPACITOR, A SILICON CONTROLLED CONTROL RECTIFIER CONNECTED ACROSS THE SECOND CAPACITOR WITH ITS CONTROL TERMINAL CONNECTED TO ONE OF THE BASES OF THE SECOND DOUBLE-BASED DIODE, THE ANODETO-CATHODE CIRCUIT OF THE SILICON CONTROLLED CONTROL RECTIFIER BEING CONNECTED ACROSS THE SMOOTH D.C. VOLTAGE SO THAT UPON THE OCCURRENCE OF AN OVERCURRENT CONDITION IN THE OUTPUT CURRENT FROM THE POLARIZING BRIDGE THE SILICON CONTROLLED CONTROL RECTIFIER WILL SHORT THE SECOND CAPACITOR SO AS TO DISARM THE FIRING CIRCUIT AND WILL MAINTAIN THE SHORT SO LONG AS SAID D.C. VOLTAGE IS SUPPLIED, (I) A FEED-BACK CIRCUIT INCLUDING A TRANSFORMER HAVING A PRIMARY WINDING ARRANGED TO BE CONNECTED ACROSS THE INCANDESCENT LIGHTING LOAD, A RECTIFYING CIRCUIT CONNECTED ACROSS THE SECONDARY WINDING OF THE TRANSFORMER, AND A FOURTH CAPACITOR AND A SECOND VARIABLE RESISTOR CONNECTED AS AN R-C FILTER NETWORK ACROSS THE OUTPUT OF THE RECTIFYING CIRCUIT, THE OUTPUT OF SAID FILTER NETWORK BEING CONNECTED ACROSS THE POTENTIOMETER OF THE INPUT CIRCUIT SO AS BY ADJUSTMENT OF THE POTENTIOMETER AND THE SECOND VARIABLE RESISTOR TO SELECTIVELY MODIFY THE AMPLITUDE AND THE RIPPLE CONTENT, RESPECTIVELY, OF THE RECTIFIED VOLTAGE SUPPLIED BY THE FEEDBACK CIRCUIT TO THE INPUT CIRCUIT, (J) A FIFTH CAPACITOR CONNECTED TO SHUNT THE SATURATING FILTER REACTOR, THE POLARIZING BRIDGE AND THE INCANDESCENT LAMP LOAD TO DAMPEN THE HIGH FREQUENCY COMPONENTS CAUSED BY THE DISCHARGE OF THE SILICON CONTROLLED POWER RECTIFIERS, (K) A SNUBBLING CIRCUIT COMPRISING A RESISTOR AND A SIXTH CAPACITOR CONNECTED IN SERIES ACROSS THE A.C. TERMINALS OF THE POLARIZING BRIDGE TO LIMIT FAST RISING LINE VOLTAGE, AND (1) MEANS TO PROTECT THE SILICON CONTROLLED POWER RECTIFERS AGAINST THERMAL OVERLOADS COMPRISING A HEAT SINK ON WHICH THE SILICON CONTROLLED COMPRISING A HEAT ARE MOUNTED, AND A THERMALLY RESPONSIVE REALY SENSITIVE TO THE TEMPERATURE OF THE HEAT SINK, SAID RELAY HAVING NORMALLY OPEN CONTACTS CONNECTED ACROSS THE SECOND CAPACITOR SO THAT WHEN THE TEMPERATURE OF THE HEAT SINK EXCEEDS A PREDETERMINED TEMPERATURE THE CONTACTS WILL CLOSE A SHORT SAID SECOND CAPACITOR AND THEREBY DISARM THE FIRING CIRCUIT FOR SO LONG AS THE TEMPERATURE OF THE HEAT SINK EXCEEDS SAID TEMPERATURE.