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US3239770A Expired / Lapsed US ⏱️ 0.0 years remaining

Complementary high frequency amplifier including multiple feedback paths

Assignee: GTE Sylvania Inc
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Filing: 1963-03-11
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Granted: 1966-03-08
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Expires: 1983-03-11
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Abstract

No abstract record available.

Inventors

  • 👤 Robert N Taber

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 17:57
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/26; H03F1/00; H03F1/34

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 126 words
AN AMPLIFIER CIRCUIT COMPRISING, FIRST AND SECOND TRANSISTORS EACH HAVING AN EMITTER, A COLLECTOR, AND A BASE, SAID SECOND TRANSISTOR BEING COMPLEMENTARY TO SAID FIRST TRANSISTOR, THE COLLECTOR AND EMITTER OF SAID FIRST TRANSISTOR BEING CONNECTED TO THE BASE AND COLLECTOR, RESPECTIVELY, OF SAID SECOND TRANSISTOR, HIGH FREQUENCY COMPENSATING MEANS CONNECTED BETWEEN THE EMITTER OF SAID SECOND TRANSISTOR AND THE COLLECTOR OF SAID FIRST TRANSISTOR, FIRST FEEDBACK MEANS COUPLING THE EMITTER OF SAID SECOND TRANSISTOR TO THE BASE OF SAID FIRST TRANSISTOR, SECOND FEEDBACK MEANS COUPLING THE COLLECTOR OF SAID SECOND TRANSISTOR TO A SOURCE OF OPERATING POTENTIAL, AN INPUT CIRCUIT FOR APPLYING A SIGNAL TO THE BASE OF SAID FIRST TRANSISTOR, AND MEANS FOR DERIVING AN OUTPUT SIGNAL FROM THE EMITTER OF SAID SECOND TRANSISTOR.
Claim 2
Dependent Claim 128 words
A PUSH-PULL AMPLIFIER COMPRISING TWO SIGNAL CHANNELS EACH OF WHICH INCLUDES FIRST AND SECOND TRANSISTORS EACH HAVING A BASE, AN EMITTER AND A COLLECTOR, SAID SECOND TRANSISTOR BEING COMPLEMENTARY TO SAID FIRST TRANSISTOR, THE COLLECTOR AND EMITTER OF SAID FIRST TRANSISTOR BEING CONNECTED RESPECTIVELY TO THE BASE AND COLLECTOR OF SAID SECOND TRANSISTOR, A HIGH FREQUENCY COMPENSATING NETWORK CONNECTED BETWEEN THE EMITTER OF SAID SECOND TRANSISTOR AND THE COLLECTOR OF SAID FIRST TRANSISTOR, FIRST AND SECOND FEEDBACK MEANS COUPLING THE EMITTER AND COLLECTOR RESPECTIVELY OF SAID SECOND TRANSISTOR TO THE BASE OF SAID FIRST TRANSISTOR; INPUT MEANS FOR APPLYING A BALANCED SIGNAL TO THE BASE OF SAID FIRST TRANSISTOR IN EACH CHANNEL, AND MEANS FOR DERIVING AN OUTPUT SIGNAL FROM THE EMITTER OF EACH OF SAID SECOND TRANSISTORS.

References Cited (Backward Citations)

US2892165A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1969-03-07 1969-09-06 1970-03-08 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1973-03-07 1973-09-06 1974-03-08 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1977-03-07 1977-09-06 1978-03-08 $7700.00 Window Closed / Lapsed

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