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US3239693A Expired / Lapsed US ⏱️ 0.0 years remaining

Bilateral electronic gate

Assignee: Avco Corp
•
Filing: 1964-09-03
•
Granted: 1966-03-08
•
Expires: 1984-09-03
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Abstract

No abstract record available.

Inventors

  • 👤 Jr Eugene A Janning

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 15:00
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/51; H03K17/74

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 167 words
AN ALTERNATING CURRENT SIGNAL PATH HAVING AN INPUT AND AN OUTPUT, SAID PATH INCLUDING A DIODE, AND MEANS FOR OPENING OR CLOSING SAID PATH TO PERMIT OR PREVENT ALTERNATING CURRENT SIGNALS FROM PASSING FROM SAID INPUT TO SAID OUTPUT, SAID MEANS COMPRISING: A FIRST DIRECT CURRENT BIASING SOURCE; A SECOND DIRECT CURRENT BIASING SOURCE; AN ALTERNATING CURRENT SIGNAL CHOKE; MEANS SELECTIVELY CONNECTING SAID FIRST DIRECT CURRENT BIASING SOURCE IN A SERIES DIRECT CURRENT LOOP WITH SAID CHOKE AND SAID DIODE FOR INITIALLY FORWARD-BIASING SAID DIODE, THEREBY OPENING SAID PATH AND PERMITTING SAID ALTERNATING CURRENT SIGNAL TO PASS THROUGH SAID PATH, OR, ALTERNATIVELY, CONNECTING SAID SECOND DIRECT CURRENT BIASING SOURCE IN A SERIES LOOP WITH SAID DIODE AND SAID CHOKE TO BACK-BIAS SAID DIODE, THEREBY PREVENTING ALTERNATING CURRENT SIGNAL TRANSMISSION THROUGH SAID PATH, SAID CHOKE DISCHARGING THROUGH SAID SECOND SOURCE AND SAID DIODE TO INITIALLY AUGMENT SAID SECOND SOURCE; AND A SECOND DIODE CONNECTED ACROSS SAID FIRST SOURCE, SAID SECOND DIODE BEING SLIGHTLY BACK-BIASED BY SAID FIRST SOURCE.
Claim 2
Dependent Claim 167 words
AN ALTERNATING CURRENT SIGNAL PATH HAVING AN INPUT AND AN OUTPUT, SAID PATH INCLUDING A DIODE, AND MEANS FOR OPENING OR CLOSING SAID PATH TO PERMIT OR PREVENT ALTERNATING CURRENT SIGNALS FROM PASSING FROM SAID INPUT TO SAID OUTPUT, SAID MEANS COMPRISING: A FIRST DIRECT CURRENT BIASING SOURCE; A SECOND DIRECT CURRENT BIASING SOURCE; AN ALTERNATING CURRENT SIGNAL CHOKE; MEANS SELECTIVELY CONNECTING SAID FIRST DIRECT CURRENT BIASING SOURCE IN A SERIES DIRECT CURRENT LOOP WITH SAID CHOKE AND SAID DIODE FOR INITIALLY FORWARD-BIASING SAID DIODE, THEREBY OPENING SAID PATH AND PERMITTING SAID ALTERNATING CURRENT SIGNAL TO PASS THROUGH SAID PATH, OR, ALTERNATIVELY, CONNECTING SAID SECOND DIRECT CURRENT BIASING SOURCE IN A SERIES LOOP WITH SAID DIODE AND SAID CHOKE TO BACK-BIAS SAID DIODE, THEREBY PREVENTING ALTERNATING CURRENT SIGNAL TRANSMISSION THROUGH SAID PATH, SAID CHOKE DISCHARGING THROUGH SAID SECOND SOURCE AND SAID DIODE TO INITIALLY AUGMENT SAID SECOND SOURCE; AND A SECOND DIODE CONNECTED ACROSS SAID FIRST SOURCE, SAID SECOND DIODE BEING SLIGHTLY BACK-BIASED BY SAID FIRST SOURCE.

References Cited (Backward Citations)

US2994789A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1969-03-07 1969-09-06 1970-03-08 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1973-03-07 1973-09-06 1974-03-08 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1977-03-07 1977-09-06 1978-03-08 $7700.00 Window Closed / Lapsed

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