Frequency stabilized saturable core oscillator

Claim 1

LOW FREQUENCY OSCILLATING TIMING APPARATUS COMPRISING: A SOURCE OF ELECTRICAL ENERGY HAVING FIRST AND SECOND TERMINALS; FIRST TRANSISTOR BISTABLE SWITCHING CIRCUIT MEANS COMPRISING FIRST AND SECOND TRANSISTORS ENERGIZED FROM SAID FIRST TERMINAL OF SAID SOURCE FOR PROVIDING CURRENT FLOW THROUGH ONE OR THE OTHER OF TWO CURRENT PATHS TO THIRD AND FOURTH TERMINALS, RESPECTIVELY DEPENDENT UPON THE STATE OF SAID BISTABLE CIRCUIT; SECOND TRANSISTOR BISTABLE SWITCHING CIRCUIT MEANS COMPRISING THIRD AND FOURTH TRANSISTORS CONNECTED INTERMEDIATE SAID THIRD AND FOURTH TERMINALS, RESPECTIVELY, AND THE SECOND TERMINAL OF SAID SOURCE; FIRST VOLTAGE DIVIDER MEANS COMPRISING FIRST AND SECOND RESISTIVE ELEMENTS IN SERIES CONECTED BETWEEN SAID THIRD AND FOURTH TERMINALS; SECOND VOLTAGE DIVIDER MEANS COMPRISING THIRD AND FOURTH RESISTIVE ELEMENTS IN SERIES BETWEEN SAID THIRD AND FOURTH TERMINALS; VOLTAGE REGULATOR MEANS CONNECTED BETWEEN SAID THIRD AND FOURTH TERMINALS; SATURABLE CORE TIMING MEANS INCLUDING A MAIN WINDING THEREON HAVING FIRST AND SECOND TERMINALS CONNECTING SAID TIMING MEANS INTERMEDIATE THE COMMON POINT OF SAID FIRST AND SECOND ELEMENTS AND THE COMMON POINT OF SAID THIRD AND FOURTH ELEMENTS AND FURTHER INCLUDING SECONDARY WINDING MEANS; AND FEEDBACK MEANS COMPRISING SAID FURTHER WINDING MEANS RESPONSIVE TO SATURATION OF SAID TIMING MEANS CONNECTED TO SAID BISTABLE MEANS FOR OPERATING SAID BISTABLE SWITCHING MEANS ON THE OPPOSITE STATE OF OPERATION.