Time rate delay circuit having controlled charge and discharge

Claim 1

A TIME RATE DELAY CIRCUIT FOR CONTROLLING THE OUTPUT OF A POWER SUPPLY, SAID CURRENT COMPRISING THE COMBINATION OF A CAPACITOR CHARGEABLE TO PRODUCE AN OUTPUT VOLTAGE ACROSS ITS PLATES; A UNIDIRECTIONAL CURRENT SOURCE PROVIDING POWER FOR CHARGING SAID CAPACITOR; A CHARGE PATH CONNECTING SAID CAPACITOR ACROSS SAID SOURCE AND INCLUDING IN SERIES CONNECTION A SWITCH MEANS, A CHARGE RATE CONTROL TRANSISTOR HAVING ITS EMITTER-COLLECTOR CIRCUIT IN SERIES WITH SAID CAPACITOR AND A CONSTANT CURRENT BIASING SOURCE CONNECTED TO ITS BASE SECTION TO BIAS IT IN A CONSTANTLY CONDUCTIVE STATE AT A PREDETERMINED LEVEL OF CONDUCTIVITY AND A DISCHARGE BLOCKING DIODE ORIENTED TO CONDUCT CHARGING CURRENT; A DISCHARGE PATH CONNECTED ACROSS SAID CAPACITOR INCLUDING IN SERIES CONNECTION A CHARGING CURRENT BLOCKING DIODE AND A DISCHARGE RATE CONTROL TRANSISTOR WITH ITS EMITTER-COLLECTOR CIRCUIT IN SERIES WITH SAID CAPACITOR AND A CONSTANT CURRENT BIASING SOURCE CONNECTED TO SAID BASE TO BIAS SAID TRANSISTOR IN CONSTANTLY CONDUCTIVE STATE AT A PREDETERMINED LEVEL OF CONDUCTIVITY; AND A REVERSE BIASING PATH CONNECTING SAID CHARGE CURRENT BLOCKING DIODE TO SAID SOURCE THROUGH SAID SWITCH MEANS TO REVERSE BIAS SAID CHARGE CURRENT BLOCKING DIODE WHEN SAID SWITCH MEANS COMPLETE A CIRCUIT TO SAID SOURCE, AND CONTAINING A DIODE TO THROUGH SAID REVERSE BIASING PATH.