US3233117A
Expired / Lapsed
US
⏱️ 0.0 years remaining
High speed logical circuits employing a negative resistance device
Assignee: International Business Machines Corp
•
Filing: 1961-03-28
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Granted: 1966-02-01
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Expires: 1981-03-28
Abstract
No abstract record available.
Inventors
- 👤 Eugene J Rymaszewski
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 15:18
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/08; H03K19/10
Claims Analysis
Total Claims: 1
Claim 1
Independent Claim
87 words
A BINARY LOGIC CIRCUIT COMPRISING: A PLURALITY OF SIGNAL RESPONSIVE VARIABLE IMPEDANCES CONNECTED TO A COMMON JUNCTION, AND A FIRST FIXED IMPEDANCE HAVING FIRST AND SECOND TERMINALS, SAID FIRST FIXED IMPEANCES HAVING ITS FIRST TERMINAL CONNECTED TO SAID JUNCTION; A TWO TERMINAL NEGATIVE RESISTANCE DEVICE HAVING A FIRST TERMINAL CONNECTED TO SAID COMMON JUNCTION, AND A SECOND FIXED IMPEDANCE HAVING FIRST AND SECOND TERMINALS, AND SECOND IMPEDANCE FIRST TERMINAL BEING CONNECTED TO THE SECOND TERMINAL OF SAID NEGATIVE RESISTANCE DEVICE TO FORM AN OUTPUT AND TERMINAL; AND
References Cited (Backward Citations)
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US2998191A
Cited
US3054911A
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1969-01-31 | 1969-08-02 | 1970-02-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1973-01-31 | 1973-08-02 | 1974-02-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1977-01-31 | 1977-08-02 | 1978-02-01 | $7700.00 | Window Closed / Lapsed |