US3231827A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Variable gain transistor amplifier
Assignee: Robert Bosch Fernsehanlagen GmbH
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Filing: 1963-01-22
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Granted: 1966-01-25
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Expires: 1983-01-22
Abstract
No abstract record available.
Inventors
- 👤 Legler Ernst
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 11:58
CPC Classifications
H; H03; H03G; H03G1/00; H03G1/0005; H03G1/0035; H03G1/0082; H03F; H03F3/00; H03F3/42; H03G3/00; H03G3/02; H03G3/04; H03G3/10; H04; H04N; H04N5/00; H04N5/44; H04N5/52
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
169 words
TRANSISTOR AMPLIFIER COMPRISING, IN COMBINATION, TWO TRANSISTORS OF OPPOSITE CONDUCTIVITY TYPE; AN INPUT LEAD; CONNECTION MEANS APPLYING A SIGNAL TO BE AMPLIFIED TO SAID INPUT LEAD; AN OUTPUT LEAD; A DIRECT VOLTAGE SOURCE HAVING TWO OPPOSITE POLES; CONNECTION MEANS CONNECTING THE COLLECTORS OF SAID TRANSISTORS TO A COMMON JUNCTION POINT; A FIRST RESISTOR; A SECOND RESISTOR; CONNECTION MEANS CONNECTING THE EMITTERS OF SAID TRANSISTORS VIA SAID FIRST AND SAID SECOND RESISTOR TO SAID OPPOSITE POLS RESPECTIVELY OF SAID DIRECT VOLTAGE SOURCE; CONNECTION MEANS CONNECTING SAID INPUT LEAD TO THE BASES OF SAID TRANSISTORS; BIASING MEANS MAINTAINING SAID BASES OF SAID TRANSISTORS AT DIFFERENT DIRECT VOLTAGES; A LOAD RESISTOR; CONNECTION MEANS CONNECTING ONE END OF SAID LOAD RESISTOR TO SAID JUNCTION POINT AND CONNECTING THE OTHER END OF SAID LOAD RESISTOR TO ONE OF SAID POLES OF SAID DIRECT VOLTAGE SOURCE; A VARIABLE RESISTANCE; CONNECTION MEANS CONNECTING THE EMITTERS OF SAID TRANSISTORS VIA SAID VARIABLE RESISTANCE; CONNECTION MEANS APPLYING THE SIGNAL AT SAID COMMON JUNCTION POINT TO SAID OUTPUT LEAD.
Claim 2
Dependent Claim
169 words
TRANSISTOR AMPLIFIER COMPRISING, IN COMBINATION, TWO TRANSISTORS OF OPPOSITE CONDUCTIVITY TYPE; AN INPUT LEAD; CONNECTION MEANS APPLYING A SIGNAL TO BE AMPLIFIED TO SAID INPUT LEAD; AN OUTPUT LEAD; A DIRECT VOLTAGE SOURCE HAVING TWO OPPOSITE POLES; CONNECTION MEANS CONNECTING THE COLLECTORS OF SAID TRANSISTORS TO A COMMON JUNCTION POINT; A FIRST RESISTOR; A SECOND RESISTOR; CONNECTION MEANS CONNECTING THE EMITTERS OF SAID TRANSISTORS VIA SAID FIRST AND SAID SECOND RESISTOR TO SAID OPPOSITE POLS RESPECTIVELY OF SAID DIRECT VOLTAGE SOURCE; CONNECTION MEANS CONNECTING SAID INPUT LEAD TO THE BASES OF SAID TRANSISTORS; BIASING MEANS MAINTAINING SAID BASES OF SAID TRANSISTORS AT DIFFERENT DIRECT VOLTAGES; A LOAD RESISTOR; CONNECTION MEANS CONNECTING ONE END OF SAID LOAD RESISTOR TO SAID JUNCTION POINT AND CONNECTING THE OTHER END OF SAID LOAD RESISTOR TO ONE OF SAID POLES OF SAID DIRECT VOLTAGE SOURCE; A VARIABLE RESISTANCE; CONNECTION MEANS CONNECTING THE EMITTERS OF SAID TRANSISTORS VIA SAID VARIABLE RESISTANCE; CONNECTION MEANS APPLYING THE SIGNAL AT SAID COMMON JUNCTION POINT TO SAID OUTPUT LEAD.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1969-01-24 | 1969-07-26 | 1970-01-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1973-01-24 | 1973-07-26 | 1974-01-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1977-01-24 | 1977-07-26 | 1978-01-25 | $7700.00 | Window Closed / Lapsed |