US3227965A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Square wave oscillator with low output impedance in all states
Assignee: Beckman Coulter Inc
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Filing: 1963-01-17
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Granted: 1966-01-04
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Expires: 1983-01-17
Abstract
No abstract record available.
Inventors
- 👤 Madsen Raymond Louis
- 👤 Songli Jomar
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 10:57
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/02; H03K3/26; H03K3/28; H03K3/281; H03K3/282; H03K3/2823
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
402 words
A CIRCUIT ARRANGEMENT FOR PRODUCING OUTPUT PULSES INCLUDING A FIRST PAIR OF TRANSISTORS, EACH BEING OPERATED IN A HIGH IMPEDANCE STATE OR A SATURATED STATE AND EACH HAVING AN EMITTER, A COLLECTOR AND A BASE, FIRST MEANS INCLUDING A CAPACITOR AND A DIODE COUPLING THE BASE OF A FIRST AND SAID TRANSISTORS TO THE COLLECTOR OF A SECOND OF SAID TRANSISTORS, SECOND MEANS INCLUDING A CAPACITOR AND A DIODE CONNECTING THE BASE OF THE SECOND TRANSISTOR TO THE COLLECTOR OF THE FIRST TRANSISTOR, THIRD MEANS CONNECTING THE EMITTER OF SAID TRANSISTORS TO A FIRST VOLTAGE TERMINAL, FOURTH MEANS COUPLING THE COLLECTOR OF THE FIRST TRANSISTOR TO A FIRST OUTPUT TERMINAL, FIFTH MEANS CONNECTING THE COLLECTOR OF THE SECOND TRANSISTOR TO A SECOND OUTPUT TERMINAL, SIXTH MEANS COUPLING THE BASES OF SAID TRANSISTORS TO A SECOND VOLTAGE TERMINAL, THE IMPROVEMENT COMPRISING A SECOND PAIR OF TRANSISTORS OF THE OPPOSITE CONDUCTIVITY TYPE AS SAID FIRST PAIR OF TRANSISTORS, EACH BEING OPERATED IN A HIGH IMPEDANCE STATE OR A SATURATED STATE, AND EACH HAVING AN EMITTER, A COLLECTOR AND A BASE, FIRST IMPEDANCE MEANS CONNECTING THE COLLECTOR OF THE FIRST TRANSISTOR OF SAID FIRST PAIR OF TRANSISTORS TO THE BASE OF A FIRST TRANSISTOR OF SAID SECOND PAIR OF TRANSISTORS, SECOND IMPEDANCE MEANS COUPLING THE COLLECTOR OF THE SECOND TRANSISTOR OF SAID FIRST PAIR OF TRANSISTORS TO THE BASE OF A SECOND TRANSISTOR OF SAID SECOND PAIR OF TRANSISTORS, SEVENTH MEANS COUPLING THE EMITTERS OF SAID SECOND PAIR OF TRANSISTORS TO SAID SECOND VOLTAGE TERMINAL, EIGHTH MEANS INCLUDING A CAPACITOR AND A DIODE CONNECTING THE BASE OF THE FIRST TRANSISTOR OF SAID SECOND PAIR OF TRANSISTORS WITH THE COLLECTOR OF THE SECOND TRANSISTOR OF SAID SECOND AIR OF TRANSISTORS, NINTH MEANS INCLUDING A CAPACITOR AND A DIODE CONNECTING THE BASE OF THE SECOND TRANSISTOR OF SAID SECOND PAIR OF TRANSISTORS WITH THE COLLECTOR OF SAID FIRST TRANSISTOR OF SAID SECOND PAIR OF TRANSISTORS, TENTH MEANS COUPLING THE COLLECTOR OF THE FIRST TRANSISTOR OF SAID SECOND PAIR OF TRANSISTORS TO SAID SECOND OUTPUT TERMINAL, ELEVENTH MEANS COUPLING THE COLLECTOR OF THE SECOND TRANSISTOR OF SAID SECOND PAIR OF TRANSISTORS TO SAID FIRST OUTPUT TERMINAL, A COMMON TERMINAL SEPARATE FROM SAID FIRST AND SECOND VOLTAGE TERMINALS, AND WITH RESPECT TO WHICH VOLTAGES AT SAID FIRST AND SECOND OUTPUT TERMINALS MAY BE MEASURED, AND MEANS COUPLING SAID COMMON TERMINAL WITH SAID EIGHTH MEANS AND WITH SAID NINTH MEANS.
Claim 2
Dependent Claim
402 words
A CIRCUIT ARRANGEMENT FOR PRODUCING OUTPUT PULSES INCLUDING A FIRST PAIR OF TRANSISTORS, EACH BEING OPERATED IN A HIGH IMPEDANCE STATE OR A SATURATED STATE AND EACH HAVING AN EMITTER, A COLLECTOR AND A BASE, FIRST MEANS INCLUDING A CAPACITOR AND A DIODE COUPLING THE BASE OF A FIRST AND SAID TRANSISTORS TO THE COLLECTOR OF A SECOND OF SAID TRANSISTORS, SECOND MEANS INCLUDING A CAPACITOR AND A DIODE CONNECTING THE BASE OF THE SECOND TRANSISTOR TO THE COLLECTOR OF THE FIRST TRANSISTOR, THIRD MEANS CONNECTING THE EMITTER OF SAID TRANSISTORS TO A FIRST VOLTAGE TERMINAL, FOURTH MEANS COUPLING THE COLLECTOR OF THE FIRST TRANSISTOR TO A FIRST OUTPUT TERMINAL, FIFTH MEANS CONNECTING THE COLLECTOR OF THE SECOND TRANSISTOR TO A SECOND OUTPUT TERMINAL, SIXTH MEANS COUPLING THE BASES OF SAID TRANSISTORS TO A SECOND VOLTAGE TERMINAL, THE IMPROVEMENT COMPRISING A SECOND PAIR OF TRANSISTORS OF THE OPPOSITE CONDUCTIVITY TYPE AS SAID FIRST PAIR OF TRANSISTORS, EACH BEING OPERATED IN A HIGH IMPEDANCE STATE OR A SATURATED STATE, AND EACH HAVING AN EMITTER, A COLLECTOR AND A BASE, FIRST IMPEDANCE MEANS CONNECTING THE COLLECTOR OF THE FIRST TRANSISTOR OF SAID FIRST PAIR OF TRANSISTORS TO THE BASE OF A FIRST TRANSISTOR OF SAID SECOND PAIR OF TRANSISTORS, SECOND IMPEDANCE MEANS COUPLING THE COLLECTOR OF THE SECOND TRANSISTOR OF SAID FIRST PAIR OF TRANSISTORS TO THE BASE OF A SECOND TRANSISTOR OF SAID SECOND PAIR OF TRANSISTORS, SEVENTH MEANS COUPLING THE EMITTERS OF SAID SECOND PAIR OF TRANSISTORS TO SAID SECOND VOLTAGE TERMINAL, EIGHTH MEANS INCLUDING A CAPACITOR AND A DIODE CONNECTING THE BASE OF THE FIRST TRANSISTOR OF SAID SECOND PAIR OF TRANSISTORS WITH THE COLLECTOR OF THE SECOND TRANSISTOR OF SAID SECOND AIR OF TRANSISTORS, NINTH MEANS INCLUDING A CAPACITOR AND A DIODE CONNECTING THE BASE OF THE SECOND TRANSISTOR OF SAID SECOND PAIR OF TRANSISTORS WITH THE COLLECTOR OF SAID FIRST TRANSISTOR OF SAID SECOND PAIR OF TRANSISTORS, TENTH MEANS COUPLING THE COLLECTOR OF THE FIRST TRANSISTOR OF SAID SECOND PAIR OF TRANSISTORS TO SAID SECOND OUTPUT TERMINAL, ELEVENTH MEANS COUPLING THE COLLECTOR OF THE SECOND TRANSISTOR OF SAID SECOND PAIR OF TRANSISTORS TO SAID FIRST OUTPUT TERMINAL, A COMMON TERMINAL SEPARATE FROM SAID FIRST AND SECOND VOLTAGE TERMINALS, AND WITH RESPECT TO WHICH VOLTAGES AT SAID FIRST AND SECOND OUTPUT TERMINALS MAY BE MEASURED, AND MEANS COUPLING SAID COMMON TERMINAL WITH SAID EIGHTH MEANS AND WITH SAID NINTH MEANS.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1969-01-03 | 1969-07-05 | 1970-01-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1973-01-03 | 1973-07-05 | 1974-01-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1977-01-03 | 1977-07-05 | 1978-01-04 | $7700.00 | Window Closed / Lapsed |