US3226575A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Pulse shaper circuit employing oppositely poled series connected tunnel diodes in base circuit of transistor
Assignee: Pacific Industries Inc
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Filing: 1963-09-30
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Granted: 1965-12-28
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Expires: 1983-09-30
Abstract
No abstract record available.
Inventors
- 👤 La Var E Whittle
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 10:33
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/02; H03K3/313; H03K3/315
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
148 words
IN A VOLTAGE WAVE SHAPING CIRCUIT FOR PRODUCING A SHARP LEADING EDGE FROM A SLOPING VOLTAGE WAVE, THE COMBINATION OF: A TRANSISTOR AMPLIFIER; AN INPUT TERMINAL; FIRST CIRCUIT MEANS FOR COUPLING SAID INPUT TERMINAL TO THE BASE OF THE TRANSISTOR OF SAID AMPLIFIER; FIRST AND SECOND TUNNEL DIODES CONNECTED IN SERIES AND OPPOSING POLARITY BETWEEN SAID FIRST CIRCUIT MEANS AND A REFERENCE POTENTIAL; AND BIAS MEANS FOR BIASING SAID TRANSITOR IN THE NONCONDUCTING CONDITION AND ONE OF SAID TUNNEL DIODES IN THE LOW VOLTAGE CONDITION AND BIASING THE OTHER OF SAID TUNNEL DIODES IN THE HIGH VOLTAGE CONDITION, WHEREBY A VOLTAGE WAVE AT SAID INPUT TERMINAL ON REACHING A PREDETERMINED VALUE SWITCHES SAID ONE TUNNEL DIODE TO THE HIGH VOLTAGE CONDITION AND SAID OTHER TUNNEL DIODE TO THE LOW VOLTAGE CONDITION CAUSING SAID TRANSISTOR AMPLIFIER TO TURN ON AND GENERATE A SHARP EDGE VOLTAGE WAVE AT THE COLLECTOR.
Claim 2
Dependent Claim
148 words
IN A VOLTAGE WAVE SHAPING CIRCUIT FOR PRODUCING A SHARP LEADING EDGE FROM A SLOPING VOLTAGE WAVE, THE COMBINATION OF: A TRANSISTOR AMPLIFIER; AN INPUT TERMINAL; FIRST CIRCUIT MEANS FOR COUPLING SAID INPUT TERMINAL TO THE BASE OF THE TRANSISTOR OF SAID AMPLIFIER; FIRST AND SECOND TUNNEL DIODES CONNECTED IN SERIES AND OPPOSING POLARITY BETWEEN SAID FIRST CIRCUIT MEANS AND A REFERENCE POTENTIAL; AND BIAS MEANS FOR BIASING SAID TRANSITOR IN THE NONCONDUCTING CONDITION AND ONE OF SAID TUNNEL DIODES IN THE LOW VOLTAGE CONDITION AND BIASING THE OTHER OF SAID TUNNEL DIODES IN THE HIGH VOLTAGE CONDITION, WHEREBY A VOLTAGE WAVE AT SAID INPUT TERMINAL ON REACHING A PREDETERMINED VALUE SWITCHES SAID ONE TUNNEL DIODE TO THE HIGH VOLTAGE CONDITION AND SAID OTHER TUNNEL DIODE TO THE LOW VOLTAGE CONDITION CAUSING SAID TRANSISTOR AMPLIFIER TO TURN ON AND GENERATE A SHARP EDGE VOLTAGE WAVE AT THE COLLECTOR.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1968-12-27 | 1969-06-28 | 1969-12-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1972-12-27 | 1973-06-28 | 1973-12-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1976-12-27 | 1977-06-28 | 1977-12-28 | $7700.00 | Window Closed / Lapsed |