US3222607A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Transistor amplifier circuit
Assignee: Electronic Associates Inc
•
Filing: 1964-02-20
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Granted: 1965-12-07
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Expires: 1984-02-20
Abstract
No abstract record available.
Inventors
- 👤 James R Patmore
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 15:26
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/30; H03F1/303
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
145 words
A STABILIZED DIRECT COUPLED AMPLIFIED SYSTEM COMPRISING IN COMBINATION, AN INPUT TERMINAL AND AN OUTPUT TERMINAL, A MULTISTAGE DIRECT COUPLED AMPLIFIER HAVING AT LEAST AN INPUT STAGE AND AN OUTPUT STAGE, A FEEDBACK CIRCUIT CONNECTED BETWEEN SAID OUTPUT TERMINAL AND SAID INPUT TERMINAL, INPUT SIGNAL MEANS FOR APPLYING TO SAID INPUT TERMINAL D.C. SIGNALS WHICH VARY WITH TIME, MEANS INCLUDING AN A.C. STABILIZING AMPLIFIER COUPLED BETWEEN SAID INPUT TERMINAL AND SAID INPUT STAGE, SAID INPUT STAGE INCLUDING A FIRST AND A SECOND TRANSISTOR OF OPPOSITE CONDUCTIVITY TYPES EACH HAVING SIMILAR BASE-TO-EMIITTER JUNCTION VOLTAGES WHICH VARY SIMILARLY AS A FUNCTION OF TEMPERATURE AND EACH HAVING AT LEAST A BASE, AN EMITTER AND A COLLECTOR, MEANS CONNECTING SAID BASE OF SAID FIRST TRANSISTOR TO SAID INPUT TERMINAL, SAID FIRST TRANSISTOR BEING CONNECTED IN AN EMITTER FOLLOWER CONFIGURATION TO PROVIDE AT SAID INPUT TERMINAL A HIGH INPUT IMPEDANCE
Claim 2
Dependent Claim
145 words
A STABILIZED DIRECT COUPLED AMPLIFIED SYSTEM COMPRISING IN COMBINATION, AN INPUT TERMINAL AND AN OUTPUT TERMINAL, A MULTISTAGE DIRECT COUPLED AMPLIFIER HAVING AT LEAST AN INPUT STAGE AND AN OUTPUT STAGE, A FEEDBACK CIRCUIT CONNECTED BETWEEN SAID OUTPUT TERMINAL AND SAID INPUT TERMINAL, INPUT SIGNAL MEANS FOR APPLYING TO SAID INPUT TERMINAL D.C. SIGNALS WHICH VARY WITH TIME, MEANS INCLUDING AN A.C. STABILIZING AMPLIFIER COUPLED BETWEEN SAID INPUT TERMINAL AND SAID INPUT STAGE, SAID INPUT STAGE INCLUDING A FIRST AND A SECOND TRANSISTOR OF OPPOSITE CONDUCTIVITY TYPES EACH HAVING SIMILAR BASE-TO-EMIITTER JUNCTION VOLTAGES WHICH VARY SIMILARLY AS A FUNCTION OF TEMPERATURE AND EACH HAVING AT LEAST A BASE, AN EMITTER AND A COLLECTOR, MEANS CONNECTING SAID BASE OF SAID FIRST TRANSISTOR TO SAID INPUT TERMINAL, SAID FIRST TRANSISTOR BEING CONNECTED IN AN EMITTER FOLLOWER CONFIGURATION TO PROVIDE AT SAID INPUT TERMINAL A HIGH INPUT IMPEDANCE
References Cited (Backward Citations)
US3015074A
Cited
US2968005A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1968-12-06 | 1969-06-07 | 1969-12-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1972-12-06 | 1973-06-07 | 1973-12-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1976-12-06 | 1977-06-07 | 1977-12-07 | $7700.00 | Window Closed / Lapsed |