Series energized transistorized circuit for amplifying and inverting polar input signals

Claim 1

AN ELECTRONIC AMPLIFIER FOR AMPLIFYING AND REVERSING POLARITY OF POLAR INPUT SIGNALS, COMPRISING FIRST AND SECOND TRANSISTORS EACH HAVING A BASE, EMITTER AND COLLECTOR, TWO HIGH VOLTAGE POWER SUPPLY TERMINALS OF OPPOSITE POLARITY, MEANS CONNECTING SAID TRANSISTORS IN SERIES BETWEEN SAID TERMINALS, A PAIR OF OUTPUT SIGNAL TERMINALS, MEANS CONNECTING ONE OF THE OUTPUT SIGNAL TERMINALS TO ONE POWER TERMINAL AND TO A JUNCTION POINT BETWEEN THE TRANSISTORS, THE OTHER OF THE OUTPUT SIGNAL TERMINALS BEING CONNECTED TO GROUND, THIRD AND FOURTH TRANSISTORS EACH HAVING A BASE, EMITTER AND COLLECTOR, A PAIR OF INPUT SIGNAL TERMINALS FOR RECEIVING SAID POLAR SIGNALS, ONE OF THE SIGNAL INPUT TERMINALS BEING GROUNDED, A VOLTAGE DIVIDER CIRCUIT INCLUDING FIRST, SECOND AND THIRD RESISTORS CONNECTED IN SERIES BETWEEN THE HIGH VOLTAGE POWER SUPPLY TERMINALS, THE TOTAL RESISTANCE OF THE FIRST AND SECOND RESISTORS BEING LESS THAN THAT OF THE THIRD RESISTOR; THE FIRST TRANSISTOR HAVING ITS BASE CONNECTED TO THE COLLECTOR OF THE THIRD TRANSISTOR, ITS EMITTER CONNECTED TO SAID ONE POWER SUPPLY TERMINAL, AND ITS COLLECTOR CONNECTED TO SAID ONE OUTPUT SIGNAL TERMINAL; THE SECOND TRANSISTOR HAVING ITS BASE CONNECTED TO THE COLLECTOR OF THE FIRST TRANSISTOR, ITS EMITTER CONNECTED TO THE ONE OUTPUT SIGNAL TERMINAL AND ITS COLLECTOR CONNECTED TO THE OTHER POWER SUPPLY TERMINAL; THE THIRD TRANSISTOR HAVING ITS BASE CONNECTED TO A FIRST JUNCTION POINT BETWEEN THE SECOND AND THIRD RESISTORS, AND HAVING ITS EMITTER CONNECTED TO GROUND; THE FOURTH TRANSISTOR HAVING ITS EMITTER CONNECTED TO THE GROUNDED SIGNAL INPUT TERMINAL, HAVING ITS BASE CONNECTED TO THE OTHER INPUT SIGNAL TERMINAL, AND HAVING ITS COLLECTOR CONNECTED TO A SECOND JUNCTION POINT BETWEEN THE FIRST AND SECOND RESISTORS; WHEREBY A HIGH SIGNAL VOLTAGE OF ONE POLARITY APPEARS AT THE OUTPUT SIGNAL TERMINALS WHEN SIGNAL VOLTAGE OF OPPOSITE POLARITY IS APPLIED AT THE INPUT TERMINALS, AND WHEREBY THE POLARITY OF THE HIGH SIGNAL VOLTAGE AT THE OUTPUT TERMINALS REVERSES WHEN THE POLARITY OF THE LOW SIGNAL VOLTAGE AT THE INPUT SIGNAL TERMINALS REVERSES.