← Back to Patent Explorer
US3210613A Expired / Lapsed US ⏱️ 0.0 years remaining

Timing circuit

Assignee: Bendix Corp
•
Filing: 1962-08-17
•
Granted: 1965-10-05
•
Expires: 1982-08-17
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

No abstract record available.

Inventors

  • 👤 Prapis Frank

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 03:08
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/13; H01; H01H; H01H47/00; H01H47/02; H01H47/18

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 128 words
A TIMING CIRCUIT FOR ENERGIZING A LOAD AFTER A PREDETERMINED TIME INTERVAL, COMPRISING (A) TIME DELAY MEANS ADAPTED TO RECEIVE A SIGNAL AND PROVIDE AN OUTPUT WHOSE AMPLITUDE VARIES WITH TIME IN ACCORDANCE WITH THE SIGNAL, (B) A FIRST TRANSISTOR HAVING A CONTROL TERMINAL CONNECTED TO THE TIME DELAY MEANS FOR RECEIVING THE OUTPUT AND BIASED TO CONDUIT WHEN THE OUTPUT EXCEEDS A PREDETERMINED LEVEL, (C) A SECOND TRANSISTOR HAVING A CONTROL TERMINAL CONNECTED TO THE FIRST TRANSISTOR AND RENDERED CONDUCTING WHEN THE FIRST TRANSISTOR CONDUCTS, (D) A LOAD CONNECTED ACROSS THE SECOND TRANSISTOR, (E) ENERGY STORAGE MEANS SERIALLY CONNECTED WITH THE LOAD AND ADAPTED TO STORE ENERGY WHEN A POTENTIAL IS APPLIED THERETO, AND DISCHARGE THROUGH THE LOAD AND THE SECOND TRANSISTOR WHEN THE SECOND TRANSISTOR CONDUCTS.
Claim 2
Dependent Claim 128 words
A TIMING CIRCUIT FOR ENERGIZING A LOAD AFTER A PREDETERMINED TIME INTERVAL, COMPRISING (A) TIME DELAY MEANS ADAPTED TO RECEIVE A SIGNAL AND PROVIDE AN OUTPUT WHOSE AMPLITUDE VARIES WITH TIME IN ACCORDANCE WITH THE SIGNAL, (B) A FIRST TRANSISTOR HAVING A CONTROL TERMINAL CONNECTED TO THE TIME DELAY MEANS FOR RECEIVING THE OUTPUT AND BIASED TO CONDUIT WHEN THE OUTPUT EXCEEDS A PREDETERMINED LEVEL, (C) A SECOND TRANSISTOR HAVING A CONTROL TERMINAL CONNECTED TO THE FIRST TRANSISTOR AND RENDERED CONDUCTING WHEN THE FIRST TRANSISTOR CONDUCTS, (D) A LOAD CONNECTED ACROSS THE SECOND TRANSISTOR, (E) ENERGY STORAGE MEANS SERIALLY CONNECTED WITH THE LOAD AND ADAPTED TO STORE ENERGY WHEN A POTENTIAL IS APPLIED THERETO, AND DISCHARGE THROUGH THE LOAD AND THE SECOND TRANSISTOR WHEN THE SECOND TRANSISTOR CONDUCTS.

References Cited (Backward Citations)

US2559508A Cited
US2906926A Cited
GB899354A Cited
US3082329A Cited
US3064165A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1968-10-04 1969-04-05 1969-10-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1972-10-04 1973-04-05 1973-10-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1976-10-04 1977-04-05 1977-10-05 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag