Semiconductor voltage regulator

Claim 1

IN COMBINATION, A GENERATOR HAVING A FIELD WINDING, A D.C. OUTPUT CICUIT ENERGIZED FROM SAID GENERATOR, A FIRST CONTROLLED RECTIFIER HAVING ANODE, CATHODE AND GATE ELECTRODES, MEANS CONNECTING THE ANODE-CATHODE CIRCUIT OF SAID FIRST CONTROLLED RECTIFIER AND THE FIELD WINDING OF SAID GENERATOR ACROSS SAID D.C. OUTPUT CIRCUIT, AN OSCILLATOR CIRCUIT INCLUDING A SECONDCONTROLLED RECTIFIER ENERGIZED FROM SAID D.C. OUTPUT CIRCUIT, MEANS CONNECTING SAID OSCILLATOR CIRCUIT WITH THE CATHOD OF SAID FIRST CONTROLLED RECTIFIER WHEREBY PULSES OF VOLTAGE ARE APPLIED TO SAID CATHODE AT A PERIODIC RATE, A VOLTAGE SENSING CIRCUIT CONNECTED ACROSS SAID D.C. OUTPUT CIRCUIT INCLUDING A BRIDGE NETWORK, SAID BRIDGE NETWORK HAVING TWO ARMS OF EQUAL RESISTANCE AND TWO OTHER ARMS COMPRISED OF AT LEAST ONE CONSTANT VOLTAGE DEVICE, A VOLTAGE DIVIDING NETWORK CONNECTED BETWEEN ONE SIDE OF SAID D.C. OUTPUT CIRCUIT AND ONE OF THE INPUT TERMINALS OF SAID BRIDGE NETWORK, MEANS CONNECTING THE OTHER INPUT TERMINAL OF SAID BRIDGE NETWORK TO AN OPPOSITE SIDE OF SAID D.C. OUTPUT CIRCUIT, A TEMPERATURE COMPENSATING RESISTOR CONNECTED ACROSS AT LEAST A PORTION OF SAID VOLTAGE DIVIDING NETWORK, A ZENER DIODE CONNECTED ACROSS SAID BRIDGE NETWORK AND ACROSS PORTION OF THE VOLTAGE DIVIDING NETWORK THAT IS SHUNTED BY SAID EMITTER, COLLECTOR AND BASE ELECTRODES, TRANSISTOR HAVING EMITTER, COLLECTOR AND BASE ELECTRODES, MEANS CONNECTING THE EMITTER AND BASE ELECTODES OF SAID TRANSISTOR WITH THE OUTPUT TERMINALS OF SAID BRIDGE NETWORK, AND MEANS CONNECTING THE COLLECTOR ELECTRODE OF SAID TRANSISTOR WITH THE GATE ELECTRODE OF SAID FIRST CONTROLLED RECTIFIER.