US3204121A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Read amplifier including differential transistor circuit with inductive and unidirectionally conductive load arrangement
Assignee: Raytheon Co
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Filing: 1962-05-02
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Granted: 1965-08-31
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Expires: 1982-05-02
Abstract
No abstract record available.
Inventors
- 👤 Ray L Riley
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 03:04
CPC Classifications
G; G11; G11C; G11C7/00; G11C7/06
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
154 words
A READ AMPLIFIER CIRCUIT COMPRISING A SOURCE OF INPUT SIGNALS, FIRST AND SECOND TRANSISTORS EACH HAVING A CONTROL ELECTRODE COUPLED TO SAID SOURCE OF SIGNALS AND EACH HAVING A LOAD CURRENT PATH, A SOURCE OF SUBSTANTIALLY CONSTANT CURRENT COUPLED TO FIRST ENDS OF THE LOAD CURRENT PATHS OF SAID FIRST AND SECOND TRANSISTORS, A POINT OF POTENTIAL, FIRST AND SECOND INDUCTORS, RESPECTIVELY COUPLED BETWEEN THE SECOND ENDS OF THE LOAD CURRENT PATHS OF SAID FIRST AND SECOND TRANSISTORS AND SAID POINT OF POTENTIAL, A FIRST DIODE HAVNG AN ANODE TO CATHODE PATH COUPLED RESPECTIVELY BETWEEN THE SECOND ENDS OF THE LOAD CURRENT PATHS OF SAID FIRST AND SECOND TRANSISTORS, A SECON DIODE HAVING AN ANODE TO CATHODE PATH COUPLED RESPECTIVELY BETWEEN THE SECOND ENDS OF THE LOAD CURRENT PATHS OF SAID SECOND AND FIRST TRANSISTORS, AND DIFFERENTIAL MEANS COUPLED TO THE SECOND ENDS OF THE LOAD CURRENT PATHS OF SAID FIRST AND SECOND TRANSISTORS.
Claim 2
Dependent Claim
154 words
A READ AMPLIFIER CIRCUIT COMPRISING A SOURCE OF INPUT SIGNALS, FIRST AND SECOND TRANSISTORS EACH HAVING A CONTROL ELECTRODE COUPLED TO SAID SOURCE OF SIGNALS AND EACH HAVING A LOAD CURRENT PATH, A SOURCE OF SUBSTANTIALLY CONSTANT CURRENT COUPLED TO FIRST ENDS OF THE LOAD CURRENT PATHS OF SAID FIRST AND SECOND TRANSISTORS, A POINT OF POTENTIAL, FIRST AND SECOND INDUCTORS, RESPECTIVELY COUPLED BETWEEN THE SECOND ENDS OF THE LOAD CURRENT PATHS OF SAID FIRST AND SECOND TRANSISTORS AND SAID POINT OF POTENTIAL, A FIRST DIODE HAVNG AN ANODE TO CATHODE PATH COUPLED RESPECTIVELY BETWEEN THE SECOND ENDS OF THE LOAD CURRENT PATHS OF SAID FIRST AND SECOND TRANSISTORS, A SECON DIODE HAVING AN ANODE TO CATHODE PATH COUPLED RESPECTIVELY BETWEEN THE SECOND ENDS OF THE LOAD CURRENT PATHS OF SAID SECOND AND FIRST TRANSISTORS, AND DIFFERENTIAL MEANS COUPLED TO THE SECOND ENDS OF THE LOAD CURRENT PATHS OF SAID FIRST AND SECOND TRANSISTORS.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1968-08-30 | 1969-03-01 | 1969-08-31 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1972-08-30 | 1973-03-01 | 1973-08-31 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1976-08-30 | 1977-03-01 | 1977-08-31 | $7700.00 | Window Closed / Lapsed |