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US3196261A Expired / Lapsed US ⏱️ 0.0 years remaining

Full binary adder

Assignee: Individual
•
Filing: 1963-01-09
•
Granted: 1965-07-20
•
Expires: 1983-01-09
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Abstract

No abstract record available.

Inventors

  • 👤 David H Schaefer

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 18:51
CPC Classifications
G; G06; G06F; G06F7/00; G06F7/38; G06F7/48; G06F7/50; G06F7/501; G06F7/502

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 133 words
A FULL BINARY ADDER COMPRISING: FIRST AND SECOND "EXCLUSIVE OR" GATES WITH EACH HAVING FIRST AND SECOND INPUT TERMINALS AND AN OUTPUT TERMINAL AND WITH AT LEAST THE FIRST "EXCLUSIVE OR" GATE INCLUDING AN "OR" GATE; MEANS FOR CONNECTING TWO BINARY INPUT SIGNALS TO THE TWO INPUT TERMINALS OF THE FIRST "EXCLUSIVE OR" GATE AND TO SAID "OR" GATE; MEANS FOR CONNECTING A THIRD BINARY INPUT SIGNAL AND THE OUTPUT SIGNAL FROM THE OUPUT TERMINAL OF THE FIRST "EXCLUSIVE OR" GATE TO THE TWO INPUT TERMINALS OF THE SECOND "EXCLUSIVE OR" GATE; FIRST AND SECOND "INHIBIT" GATES WITH EACH HAVING ONE INVERTED AND ONE NON-INVERTED INPUT TERMINAL AND WITH EACH HAVING AN OUTPUT TERMINAL; MEANS FOR CONNECTING SAID THIRD INPUT SIGNAL TO THE INVERTED INPUT TERMINAL OF THE FIRST "INHIBIT" GATE; MEANS FOR
Claim 2
Dependent Claim 133 words
A FULL BINARY ADDER COMPRISING: FIRST AND SECOND "EXCLUSIVE OR" GATES WITH EACH HAVING FIRST AND SECOND INPUT TERMINALS AND AN OUTPUT TERMINAL AND WITH AT LEAST THE FIRST "EXCLUSIVE OR" GATE INCLUDING AN "OR" GATE; MEANS FOR CONNECTING TWO BINARY INPUT SIGNALS TO THE TWO INPUT TERMINALS OF THE FIRST "EXCLUSIVE OR" GATE AND TO SAID "OR" GATE; MEANS FOR CONNECTING A THIRD BINARY INPUT SIGNAL AND THE OUTPUT SIGNAL FROM THE OUPUT TERMINAL OF THE FIRST "EXCLUSIVE OR" GATE TO THE TWO INPUT TERMINALS OF THE SECOND "EXCLUSIVE OR" GATE; FIRST AND SECOND "INHIBIT" GATES WITH EACH HAVING ONE INVERTED AND ONE NON-INVERTED INPUT TERMINAL AND WITH EACH HAVING AN OUTPUT TERMINAL; MEANS FOR CONNECTING SAID THIRD INPUT SIGNAL TO THE INVERTED INPUT TERMINAL OF THE FIRST "INHIBIT" GATE; MEANS FOR

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1968-07-19 1969-01-18 1969-07-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1972-07-19 1973-01-18 1973-07-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1976-07-19 1977-01-18 1977-07-20 $7700.00 Window Closed / Lapsed

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