US3194974A
Expired / Lapsed
US
⏱️ 0.0 years remaining
High speed logic circuits
Assignee: International Business Machines Corp
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Filing: 1961-03-28
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Granted: 1965-07-13
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Expires: 1981-03-28
Abstract
No abstract record available.
Inventors
- 👤 Eugene J Rymaszewski
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 21:27
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/08; H03K19/10
Claims Analysis
Total Claims: 1
Claim 1
Independent Claim
121 words
A HIGH SPEED LOGICAL CIRCUIT FOR PROVIDING AN OUTPUT SIGNAL INDICATIVE OF THE SUM MODULO TWO LOGIC FUNCTION FROM A THREE-WAY CURRENT INPUT SIGNAL, EACH WAY OF SAID INPUT SIGNAL BEING EXPRESSED IN BINARY FORM AS A ONE OR A ZERO, INDICATIVE OF THE PRESENCE OR ABSENCE OF AN INDIVIDUAL INPUT SIGNAL, COMPRISING A TWO TERMINAL DEVICE HAVING A NEGATIVE RESISTANCE ATTRIBUTE IN THE FORWARD CONDUCTING REGION, A UNIDIRECTIONAL CONDUCTING DEVICE INCLUDING AT LEAST ONE RECTIFYING DIODE, MEANS SERIES CONNECTING IN LIKE POLARITY ONE TERMINAL OF THE FIRST MENTIONED DEVICE TO THE UNIDIRECTIONAL CONDUCTING DEVICE, SAID DEVICES HAVING A COMBINED VOLT-AMPERE CHARACTERISTIC WITH A NEGATIVE RESISTANCE ATTRIBUTE IN THE FORWARD CONDUCTING REGION, MEANS TO ESTABLISH A MONOSTABLE OPERATING LOAD LINE FOR
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1968-07-12 | 1969-01-11 | 1969-07-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1972-07-12 | 1973-01-11 | 1973-07-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1976-07-12 | 1977-01-11 | 1977-07-13 | $7700.00 | Window Closed / Lapsed |