Transistor pulse generating circuit of alternately opposite polarities

Claim 1

A PULSE GENERATING CIRCUIT, COMPRISING, TWO CAPACITORS EACH HAVING FIRST AND SECOND PLATES, TWO CIRCUITS FOR CHARGING SAID CAPACITORS TO OPPOSITE POTENTIALS WITH RESPECT TO A COMMON JUNCTION TO WHICH SAID FIRST PLATE OF EACH CAPACITOR IS CONNECTED, TWO TRANSISTORS EACH HAVING AN EMITTER-COLLECTOR CIRCUIT AND BASE TERMINAL, TWO CIRCUITS EACH INCLUDING ONE OF SAID TRANSISTORS AND EACH PROVIDING A DISCHARGE PATH FOR ONE OF SAID CAPACITORS FROM SAID SECOND PLATE THROUGH THE EMITTERCOLLECTOR CIRCUIT OF THE RESPECTIVE TRANSISTOR AND THROUGH A LOAD DEVICE TO SAID COMMON JUNCTION, AND MEANS COUPLED TO THE BASE OF EACH OF SAID TWO TRANSISTORS RESPONSIVE TO AN INPUT SIGNAL FOR RENDERING SAID TRANSISTORS CONDUCTIVE ALTERNATELY.