Analog-digital converter

Claim 1

AN ANALOG-DIGITAL CONVERTER COMPRISING: (A) A FIRST POSITION MEASURING TRANSFORMER HAVING (1) A VARIABLE MECHANICAL ANALOG INPUT AND (2) RELATIVELY MOVABLE MEMBERS, (3) ONE OF SAID MEMBERS HAVING POLYPHASE WINDINGS, (4) ANOTHER OF SAID MEMBERS HAVING A SINGLE PHASE WINDING FOR SUPPLYING A FIRST PHASE SENSITIVE RELATIVE POSITION SIGNAL; (B) A SECOND POSITION MEASURING TRANSFORMER HAVING (1) SAID MECHANICAL ANALOG INPUT AND (2) RELATIVELY MOVABLE MEMBERS, (3) THE FIRST OF SAID LAST MENTIONED MEMBERS HAVING POLYPHASE WINDINGS, (4) THE SECOND OF SAID LAST MENTION MEMBERS HAVING A SINGLE PHASE WINDING FOR SUPPLYING A SECOND PHASE SENSITIVE RELATIVE POSITION SIGNAL; THE CHANGE IN PHASE OF SAID FIRST PHASE SENSITIVE SIGNAL FOR A GIVEN CHANGE IN SAID ANALOG INPUT BEING AN INTEGRAL MULTIPLE OF THE CHANGE IN PHASE OF THE SAID SECOND PHASE SENSITIVE SIGNAL PRODUCED BY THE SAME CHANGE IN SAID ANALOG INPUT; (C) A CLOCK PULSE GENERATOR SUPPLYING PULSES TO (D) A FREQUENCY DIVIDER HAVING AN OUTPUT OF (1) SUB-HARMONIC FREQUENCY AS AN INPUT TO (E) A POLYPHASE GENERATOR HAVING AS OUTPUTS (1) POLYPHASE SIGNALS FOR INPUTS TO SAID FIRST POLYPHASE WINDINGS, (2) POLYPHASE SIGNALS FOR INPUTS TO SAID SECOND POLYPHASE WINDINGS AND (3) A REFERENCE SIGNAL AS AN INPUT TO (F) A FIRST NULL CROSSING DETECTOR HAVING AN OUTPUT OF A (1) FIRST CONTROL SIGNAL; (G) A SECOND NULL CROSSING DETECTOR HAVING AN INPUT OF (1) SAID FIRST PHASE SENSITIVE RELATIVE POSITION SIGNAL AND AN OUTPUT OF (2) A SECOND CONTROL SIGNAL; (H) A THIRD NULL CROSSING DETECTOR HAVING AN INPUT OF (1) SAID SECOND PHASE SENSITIVE RELATIVE POSITION SIGNAL AND AN OUTPUT OF (2) A THIRD CONTROL SIGNAL; (I) A FIRST GATE HAVING INPUTS OF (1) SAID CLOCK PULSES, (2) SAID FIRST CONTROL SIGNAL AND (3) SAID SECOND CONTROL SIGNAL, AND HAVING AN OUTPUT OF (4) A FIRST NUMBER OF CLOCK PULSES REPRESENTING A FIRST DIGITAL NUMBER CORRESPONDING TO THE TIME DIFFERENCE BETWEEN THE FIRST CONTROL SIGNAL AND THE SECOND CONTROL SIGNAL, (J) A SWITCH HAVING INPUTS OF (1) AN EARLY TRAIN OF CLOCK PULSES, (2) A LATER TRAIN OF CLOCK PULSES, (3) A SIGNAL PROPORTIONAL TO SAID FIRST DIGITAL NUMBER, AND HAVING AN OUTPUT OF (4) SAID EARLY TRAIN OF CLOCK PULSES WHEN SAID FIRST DIGITAL NUMBER IS LESS THAN HALF OF THE RANGE OF SAID FIRST DIGITAL NUMBER, OR (5) SAID LATER TRAIN OF CLOCK PULSES WHEN SAID FIRST DIGITAL NUMBER IS GREATER THAN HALF OF SAID RANGE OF SAID FIRST DIGITAL NUMBER, (K) A SECOND GATE HAVING INPUTS OF (1) SAID EARLY TRAIN OR SAID LATE TRAIN OF SAID CLOCK PULSES, (2) SAID FIRST CONTROL SIGNAL AND (3) SAID THIRD CONTROL SIGNAL, AND HAVING AN OUTPUT OF (4) A SECOND NUMBER OF CLOCK PULSES REPRESENTING A SECOND DIGITAL NUMBER CORRESPONDING TO THE TIME DIFFERENCE BETWEEN THE FIRST CONTROL SIGNAL AND THE THIRD CONTROL SIGNAL, (5) A FULL RANGE OF SAID FIRST DIGITAL NUMBER BEING EQUIVALENT TO ONE COUNT OF SAID SECOND DIGITAL NUMBER.