Trigger circuit including means for establishing a triggered discrimination level

Claim 1

A BISTABLE STATE CIRCUIT COMPRISING: FIRST AND SECOND TRANSISTORS EACH INCLUDING AN EMITTER, A COLLECTOR, AND A BASE; FIRST MEANS INTERCONNECTING SAID BASES INCLUDING A PAIR OF OPPOSITELY POLED DIODES CONNECTED DIRECTLY IN PARALLEL WITH EACH OTHER; A POTENTIAL SOURCE; MEANS COUPLING SAID POTENTIAL SOURCE TO SAID FIRST AND SECOND TRANSISTORS FOR CONDUCTING CURRENT BETWEEN THE EMITTERS ADN COLLECTORS THEREOF; MEANS RESPONSIVE TO SAID FIRST TRANSISTOR CONDUCTING CURRENT FOR DRIVING A CURRENT THROUGH SAID PAIR OF DIODES IN A FIRST DIRECTION FROM THE BASE OF SAID FIRST TRANSISTOR TO THE BASE OF SAID SECOND TRANSISTOR; MEANS RESPONSIVE TO SAID SECOND TRANSISTOR CONDUCTING CURRENT FOR DRIVING A CURRENT THROUGH SAID PAIR OF DIODES IN A SECOND DIRECTION FROM THE BASE OF SAID SECOND TRANSISTOR TO THE BASE OF SAID FIRST TRANSISTOR; MEANS INTERCONNECTING SAID EMITTERS OF SAID FIRST AND SECOND TRANSISTORS; MEANS FOR CAUSING CURRENT CONDUCTION IN SAID FIRST TRANSSISTOR AND FOR INHIBITING CURRENT CONDUCTION IN SAID SECOND TRANSISTOR IN RESPONSE TO THE VOLTAGE DROP BETWEEN THE BASE AND EMITTER OF SAID FIRST TRANSISTOR EXCEEDING THE VOLTAGE DROP BETWEEN THE BASE AND EMITTER OF SAID SECOND TRANSISTOR AND FOR CAUSING CURRENT CONDUCTION IN SAID FIRST TRANSISTOR IN RESPONSE TO THE VOLT-