Nested region transistor configuration

Claim 1

A SEMICONDUCTOR DEVICE COMPRISING A BODY OF SEMICONDUCTOR MATERIAL HAVING A SURFACE, SAID BODY HAVING ALTERNATING REGIONS OF OPPOSITE CONDUCTIVELY IN A NESTING RELATIONSHIP, EACH INNER REGION SEPARATED FROM AN ADJACENT SURROUNDING REGION BY A JUNCTION WHICH EXTENDS TO SAID SURFACE AND THERE COMPLETELY SURROUNDS THE INNER REGION, EACH SUCCESSIVE INNER REGION LOCATED ECCENTRICALLY WITHIN ITS SURROUNDING REGION AND FORMING A LEDGE IN THE SURROUNDING REGION EXTENDING TO THE SURFACE AND PROJECTING LATERALLY TO ONE SIDE OF THE SURROUNDED INNER REGION, ONE OF THE SURROUNDING REGIONS BEING THINNER IN THE LEDGE PORTION THAN IN THE PORTION THEREOF IMMEDIATELY ADJACENT AND BENEATH ITS SURROUNDED INNER REGION, AN INSULATING FILM COVERING SAID SURFACE WHICH LEAVES EXPOSED AN AREA OF SAID SURFACE ALIGNED OVER THE THINNER LEDGE PORTION OF THE SAID ONE SURROUNDING REGION AND OVER ITS SURROUNDED INNER REGION, AND SEPARATE CONDUCTIVE CONTACTS OVERLYING SAID SURFACE IN ELECTRICAL OHMIC CONNECTION WITH THE EXPOSED AREAS OF EACH OF SAID REGIONS AND OVERLYING THE INSULATING FILM AT ALL OTHER POINTS.