← Back to Patent Explorer
US3177422A Expired / Lapsed US ⏱️ 0.0 years remaining

Low level transistor chopper circuit

Assignee: General Electric Co
•
Filing: 1960-12-30
•
Granted: 1965-04-06
•
Expires: 1980-12-30
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

No abstract record available.

Inventors

  • 👤 Fritz H Schlereth

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 00:33
CPC Classifications
H; H02; H02M; H02M3/00; H02M3/02; H02M3/04; H02M3/10; G; G01; G01R; G01R19/00; G01R19/18; H02M3/145; H02M3/155; H02M7/00; H02M7/42; H02M7/44; H02M7/48; H02M7/53; H02M7/537; H03; H03F; H03F3/00; H03F3/38; H03F3/387; H03K; H03K17/00; H03K17/51; H03K17/56; H03K17/60

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 177 words
A LOW LEVEL TRANSISTOR CHOPPER CIRCUIT FOR CONVERTING THE VOLTAGE FROM A DIRECT INPUT VOLTAGE SOURCE INTO AN ALTERNATING OUTPUT VOLTAGE ACROSS A LOAD, SAID LOAD AND SAID INPUT VOLTAGE SOURCE EACH HAVING A FIRST TERMINAL AND A COMMON TERMINAL COMPRISING A FIRST AND SECOND TRANSISTOR OF MATCHING CHARACTERISTICS EACH HAVING COLLECTOR, EMITTER AND BASE ELECTRODES, THE COLLECTOR TO EMITTER PATH OF SAID FIRST TRANSISTOR BEING COUPLED IN SERIES WITH SAID LOAD BETWEEN SAID FIRST TERMINALS, THE COLLECTOR TO EMITTER PATH OF SAID SECOND TRANSISTOR BEING COUPLED IN SHUNT WITH SAID LOAD, CONTROL SIGNAL MEANS FOR APPLYING FIRST AND SECOND CONTROL VOLTAGES BETWEEN SAID COMMON TERMINAL AND THE BASE ELECTRODES OF SAID FIRST AND SECOND TRANSISTORS RESPECTIVELY, THEREBY PROVIDING FIRST AND SECOND ALTERNATING CURRENT SIGNALS OF EQUAL AMPLITUDE AND OPPOSITE PHASE TO THE BASE ELECTRODES OF SAID FIRST AND SECOND TRANSISTORS RESPECTIVELY, SAID SIGNALS CAUSING SAID FIRST AND SECOND TRANSISTORS TO BE ALTERNATELY FULLY CONDUCTING AND NONCONDUCTING, WHEREBY AN ALTERNATING OUTPUT VOLTAGE APPEARS ACROSS THE LOAD WHICH IS PROPORTIONAL TO THE MAGNITUDE OF THE DIRECT INPUT VOLTAGE.
Claim 2
Dependent Claim 177 words
A LOW LEVEL TRANSISTOR CHOPPER CIRCUIT FOR CONVERTING THE VOLTAGE FROM A DIRECT INPUT VOLTAGE SOURCE INTO AN ALTERNATING OUTPUT VOLTAGE ACROSS A LOAD, SAID LOAD AND SAID INPUT VOLTAGE SOURCE EACH HAVING A FIRST TERMINAL AND A COMMON TERMINAL COMPRISING A FIRST AND SECOND TRANSISTOR OF MATCHING CHARACTERISTICS EACH HAVING COLLECTOR, EMITTER AND BASE ELECTRODES, THE COLLECTOR TO EMITTER PATH OF SAID FIRST TRANSISTOR BEING COUPLED IN SERIES WITH SAID LOAD BETWEEN SAID FIRST TERMINALS, THE COLLECTOR TO EMITTER PATH OF SAID SECOND TRANSISTOR BEING COUPLED IN SHUNT WITH SAID LOAD, CONTROL SIGNAL MEANS FOR APPLYING FIRST AND SECOND CONTROL VOLTAGES BETWEEN SAID COMMON TERMINAL AND THE BASE ELECTRODES OF SAID FIRST AND SECOND TRANSISTORS RESPECTIVELY, THEREBY PROVIDING FIRST AND SECOND ALTERNATING CURRENT SIGNALS OF EQUAL AMPLITUDE AND OPPOSITE PHASE TO THE BASE ELECTRODES OF SAID FIRST AND SECOND TRANSISTORS RESPECTIVELY, SAID SIGNALS CAUSING SAID FIRST AND SECOND TRANSISTORS TO BE ALTERNATELY FULLY CONDUCTING AND NONCONDUCTING, WHEREBY AN ALTERNATING OUTPUT VOLTAGE APPEARS ACROSS THE LOAD WHICH IS PROPORTIONAL TO THE MAGNITUDE OF THE DIRECT INPUT VOLTAGE.

References Cited (Backward Citations)

US2922051A Cited
US2821639A Cited
US3152306A Cited
US3039065A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1968-04-05 1968-10-05 1969-04-06 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1972-04-05 1972-10-05 1973-04-06 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1976-04-05 1976-10-05 1977-04-06 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag