Redundant transistor circuits

Claim 1

A STANDBY CIRCUIT ARRANGEMENT COMPRISING FIRST AND SECOND TRANSISTOR EACH HAVING BASE, EMITTER AND COLLECTOR ELECTRODES AND EACH ADAPTED TO PERFORMS THE SAME CIRCUIT FUNCTION WHEN SUITABLY ENERGIZED, A FIRST SOURCE OF POTENTIAL OF ONE POLARITY CONNECTED TO THE COLLECTORS OF BOTH OF SAID TRANSISTORS, A SECOND SOURCE OF POTENTIAL OF OPPOSITE POLARITY CONNECTED THROUGH A FIRST RESISTOR TO THE EMITTER OF SAID FIRST TRANSISTOR, SECOND AND THIRD RESISTORS RESPECTIVELY CONNECTED FROM THE BASE ELECTRODES OF SAID FIRST AND SECOND TRANSISTORS TO A POINT OF REFERENCE POTENTIAL, AND A DIODE CONNECTED BETWEEN THE EMITTERS OF SAID FIRST AND SECOND TRANSISTORS POLED TO CONDUCT CURRENT IN THE FORWARD DIRECTION FROM THE EMIITER OF SAID SECOND TRANSISTOR TO THE EMITTER OF SAID FIRST TRANSISTOR, SAID POTENTIALS AND SAID RESISTORS HAVING SUCH RELATIVE VALUES THAT SAID FIRST TRANSISTOR IS NORMALLY OPERATIVE AND SAID DIODE IS NORMALLY BIASED TO PREVENT CURRENT FLOW THERETHROUGH, AND ON FAILURE OF SAID FIRST TRANSISTOR, SAID DIODE IS BIASED INTO ITS FORWARD CONDUCTION REGION THEREBY TO CONNECT SAID SECOND SOURCE OF POTENTIAL TO THE EMITTER OF SAID SECOND TRANSISTOR TO CAUSE OPERATION OF SAID SECOND TRANSISTOR.