Magnetic core memory

Claim 1

A MAGNETIC CORE MEMORY ARRAY COMPRISING A PLURALITY OF MAGNETIC CORES EXHIBITING FIRST AND SECOND STATES OF MAGNETIZATION, FIRST SWITCHING CONDUCTORS LINKING SAID CORES ALONG A PLURALITY OF ROWS, SECOND SWITCHING CONDUCTORS LINKING SAID CORES ALONG A PLURALITY OF COLUMNS, SO THAT EACH CORE IS LINKED BY ONE OF EACH OF SAID ROWS AND COLUMN SWITCHING CONDUCTORS, A PLURALITY OF SOURCES OF CURRENT, A PLURALITY OF RESISTORS COUPLING SAID SOURCES TO FIRST TERMINALS OF RESPECTIVE ONES OF SAID SWITCHING CONDUCTORS, SAID RESISTORS EXHIBITING HIGH IMPEDANCE RELATIVE TO SAID CONDUCTORS SO THAT SAID SOURCES MAY FURNISH SUBSTANTIALLY CONSTANT CURRENT TO SAID SWITCHING CONDUCTORS A PLURALITY OF TRANSISTORS HAVING AN ELECTRODE THEREOF COUPLED RESPECTIVELY TO SECOND TERMINALS OF SAID SWITCHING CONDUCTORS THEREBY TO CONNECT SELECTIVELY SAID CURRENT SOURCES TO SAID SWITCHING CONDUCTORS, SIGNAL MEANS COUPLED TO OTHER ELECTRODES OF SAID TRANSISTORS TO RENDER SAID TRANSISTORS SELECTIVELY OPERATIVE, EACH CURRENT SOURCE SUPPLYING TO ITS RESPECTIVE CONDUCTOR A FRACTION ONLY OF THE CURRENT REQUIRED TO SWITCH THE CORES LINKED BY SAID CONDUCTOR FROM THEIR FIRST TO THEIR SECOND STATE OF MAGNETIZATION SO THAT IN ORDER TO SWITCH A SELECTED CORE CURRENT MUST BE SUPPLIED TO THE ROW AND COLUMN SWITCHING CONDUCTOR LINKING SAID CORE, AND A SEPARATE RESISTOR HAVING A RESISTANCE EQUAL TO THE CHARACTERISTIC IMPEDANCE OF SAID SWITCHING CONDUCTORS CONNECTED BETWEEN SAID FIRST AND SECOND TERMINALS OF EACH SWITCHING CONDUCTOR.