US3168707A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Bypass arrangement for increasing circuit reliability
Assignee: GTE Sylvania Inc
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Filing: 1961-12-27
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Granted: 1965-02-02
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Expires: 1981-12-27
Abstract
No abstract record available.
Inventors
- 👤 Levitt Matthew
- 👤 Robert W Whitney
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 10:18
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/52
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
224 words
IN COMBINATION WITH A MULTI-STAGE CIRCUIT OF CASCADECONNECTED SIMILAR SIGNAL CIRCUIT STAGES EACH INCLUDING AN INPUT CIRCUIT, AN OUTPUT CIRCUIT, SIGNAL PROCESSING MEANS CONNECTED BETWEEN SAID INPUT AND OUTPUT CIRCUITS, AND A FIRST SOURCE OF DIRECT CURRENT PO TENTIAL CONNECTED TO SAID OUTPUT CIRCUIT, AN ALTERNATING CURRENT BY-PASS CIRCUIT FOR AT LEAST OF SAID STAGES WHICH COMPRISES: A VOLTAGE-VARIBLE CAPACITOR AND ANOTHER CAPACITOR SERIALLY CONNECTED TO SAID TWEEN A FIRST POINT IN THE OUTPUT CIRCUIT OF THE STAGE AND A SECOND POINT IN SAID INPUT CIRCUIT, AND A SECOND SOURCE OF DIRECT CURRENT POTENTIAL CONNECTED TO THE JUNCTION OF SAID CAPACITORS, SAID SECOND SOURCE BEING OF A VALVE TO BIAS SAID VOLTAGE-VARIABLE CAPACITOR RELATIVE TO THE POTENTIAL AT SAID FIRST POINT DURING NORMAL OPERATION OF THE STAGE TO HAVE A CAPACITANCE OF A VALUE WHICH OFFERS A HIGH IMPEDANCE AT THE FREQUENCY OF OPERATION TO THEREBY LIMIT ALTERNATING CURRENT FEEDBACK FROM SAID FIRST POINT TO SAID SECOND POINT THROUGH SAID BYPASS CIRCUIT, AND TO BIAS SAID VOLTAGE-VARIABLE CAPACITOR RELATIVE TO THE POTENTIAL AT SAID FIRST POINT UPON A CHANGE IN THE LATTER POTENTIAL ATTENDANT A FAILURE IN SAID SIGNAL PROCESSING MEANS TO CAUSE IT TO FUNCTION AS A DIODE TO THEREBY PROVIDE A LOW IMPEDANCE SIGNAL PATH THROUGH SAID BYPASS CIRCUIT FOR COUPLING THE SIGNAL AROUND THE FAULTY SIGNAL PROCESSING MEANS OF THE STAGE.
Claim 2
Dependent Claim
224 words
IN COMBINATION WITH A MULTI-STAGE CIRCUIT OF CASCADECONNECTED SIMILAR SIGNAL CIRCUIT STAGES EACH INCLUDING AN INPUT CIRCUIT, AN OUTPUT CIRCUIT, SIGNAL PROCESSING MEANS CONNECTED BETWEEN SAID INPUT AND OUTPUT CIRCUITS, AND A FIRST SOURCE OF DIRECT CURRENT PO TENTIAL CONNECTED TO SAID OUTPUT CIRCUIT, AN ALTERNATING CURRENT BY-PASS CIRCUIT FOR AT LEAST OF SAID STAGES WHICH COMPRISES: A VOLTAGE-VARIBLE CAPACITOR AND ANOTHER CAPACITOR SERIALLY CONNECTED TO SAID TWEEN A FIRST POINT IN THE OUTPUT CIRCUIT OF THE STAGE AND A SECOND POINT IN SAID INPUT CIRCUIT, AND A SECOND SOURCE OF DIRECT CURRENT POTENTIAL CONNECTED TO THE JUNCTION OF SAID CAPACITORS, SAID SECOND SOURCE BEING OF A VALVE TO BIAS SAID VOLTAGE-VARIABLE CAPACITOR RELATIVE TO THE POTENTIAL AT SAID FIRST POINT DURING NORMAL OPERATION OF THE STAGE TO HAVE A CAPACITANCE OF A VALUE WHICH OFFERS A HIGH IMPEDANCE AT THE FREQUENCY OF OPERATION TO THEREBY LIMIT ALTERNATING CURRENT FEEDBACK FROM SAID FIRST POINT TO SAID SECOND POINT THROUGH SAID BYPASS CIRCUIT, AND TO BIAS SAID VOLTAGE-VARIABLE CAPACITOR RELATIVE TO THE POTENTIAL AT SAID FIRST POINT UPON A CHANGE IN THE LATTER POTENTIAL ATTENDANT A FAILURE IN SAID SIGNAL PROCESSING MEANS TO CAUSE IT TO FUNCTION AS A DIODE TO THEREBY PROVIDE A LOW IMPEDANCE SIGNAL PATH THROUGH SAID BYPASS CIRCUIT FOR COUPLING THE SIGNAL AROUND THE FAULTY SIGNAL PROCESSING MEANS OF THE STAGE.
References Cited (Backward Citations)
US2356296A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1968-02-02 | 1968-08-03 | 1969-02-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1972-02-02 | 1972-08-03 | 1973-02-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1976-02-02 | 1976-08-03 | 1977-02-02 | $7700.00 | Window Closed / Lapsed |