Electronic circuit for simulating brain neuron characteristics including memory means producing a self-sustaining output

Claim 1

AN ELECTRONIC NEURON COMPRISING: (A) AN INPUT CIRCUIT FOR SUMMING A PLURALITY OF APPLIED VOLTAGES; (B) AN INTEGRATING PULSE SHAPER TO WHICH SAID SUMMED VOLTAGE IS APPLIED AND RESPONSIVE TO A PREDETERMINED SUMMATION OF APPLIED VOLTAGE FOR GENERATING AN OUTPUT; (C) SAID INTEGRATING PULSE SHAPER INCLUDING A CHARGING CIRCUIT TO WHICH SAID SUMMED VOLTAGED IS APPLIED WHEREIN THE MAGNITUDE OF SAID SUMMED VOLTAGE DETERMINES THE TIME INTERVAL THROUGH WHICH SAID SUMMED VOLTAGE MUST BE APPLIED TO REACH SAID PREDETERMINED SUMMATION OF VOLTAGE FOR GENERATING AN OUTPUT; (D) AN INHIBIT CIRCUIT CONNECTED TO SAID INTEGRATING PULSE SHAPER AND RESPONSIVE TO AN OUTPUT THEREFROM TO BECOME OPERATIVE TO REDUCE THE SUMMED VOLTAGE TO A PREDETERMINED LOW VALUE, WHEREIN SAID INTEGRATING PULSE SHAPER TERMINATES ITS OUTPUT; AND (E) A STORAGE CIRCUIT INCLUDING IN SAID INHIBIT CIRCUIT FOR RETAINING SAID INHIBIT CIRCUIT IN AN OPERATIVE STATE TO A TIME SUBSEQUENT TO THE TERMINATION OF THE OUTPUT PULSE SHAPER TERMINATES ITS OUTPUT; AND (F) A MEMORY RESPONSIVE TO AN OUTPUT FROM SAID INTEGRATING PULSE SHAPER FOR GENERATING AN OUTPUT VOLTAGE; (G) MEANS FOR CONNECTING THE OUTPUT OF SAID MEMORY TO SAID INPUT WHEREBY THE CONDITION OF MEMORY AIDS IN ESTABLISHING THE OUTPUT OF WHICH IT IS RESPONSIVE, WHEREBY THE FREQUENCY OUTPUT OF SAID INTEGRATING PULSE SHAPER MAY BE INCREASED; (H) MEANS CONTAINED IN SAID MEMORY UNIT FOR ESTABLISHING THE TIME PERIOD THROUGH WHICH SAID OUTPUT VOLTAGE WILL BE GENERATED; (I) WHEREIN SAID LAST-MENTIONED MEANS IS RESPONSIVE TO THE FREQUENCY OF PULSE OUTPUT FROM SAID INTEGRATING PULSE SHAPER FOR ESTABLISHING SAID TIME PERIOD.