Error detector for digital communications

Claim 1

FOR BINARY DIGITAL COMMUNICATION SYSTEM UTILIZING A CONVOLUTIONAL ERROR DETECTING TECHNIQUE, MEANS FOR PRODUCING PARITY DIGITS FROM MESSAGE DIGITS, WHICH COMPRISES: A MULTI-STAGE SHIFT REGISTER HAVING AN INPUT CONNECTING AND AN OUTPUT CONNECTION; MEANS FOR APPLYING SAID MESSAGE DIGITS SEQUENTIALLY TO SAID INPUT CONNECTION; MEANS FOR SHIFTING SAID DIGITS THROUGH SAID REGISTER; MEANS FOR PERFORMING A SUM-MODULO-TWO ADDITION OF THE CONTENTS OF SAID REGISTER EACH TIME SAID REGISTER SHIFTS ONE OF SAID DIGITS INCLUDING A SINGLE STAGE BI-STABLE ELEMENT ARRANGED FOR STORING THE SUM-MODULO-TWO ADDITION OF THE CONTENTS OF SAID REGISTER BEFORE EACH OF SAID DIGIT SHIFTS; SAID BISTABLE ELEMENT HAVING A SINGLE COMPLEMENTING INPUT CONNECTED TO SAID INPUT AND OUTPUT CONNECTIONS; MEANS FOR CANCELLING DIGITS FROM THE TOTAL OF SAID ADDITION;SAID MEANS INCLUDING CONNECTIONS FOR THE INPUT AND OUTPUT OF REGISTER STAGES CONTAINING SAID DIGITS TO SAID COMPLEMENTING INPUT OF SAID BI-STABLE ELEMENT; AND MEANS INCLUDING SIGNAL DELAY MEANS OF DIFFERENT DURATION IN SAID DIFFERENT CONNECTIONS TO SAID COMPLEMENTING INPUT FOR DERIVING SAID PARITY DIGITS FROM THE OUTPUT OF SAID BI-STABLE ELEMENT.