Gate having voltage divider shunting series emitter-collector paths and individual base-bias level setting means equalizing transistor leakage currents

Claim 1

IN AN ELECTRIC SWITCH, FIRST AND SECOND TRANSISTORS EACH HAVING A BASE, AN EMITTER AND A COLLECTOR, MEANS FOR CONNECTING SAID EMITTER AND COLLECTOR OF EACH OF SAID TRANSISTORS IN SERIES CIRCUIT ACROSS A SOURCE OF ELECTRICAL POTENTIAL, IMPEDANCE MEANS CONNECTED ACROSS EACH OF SAID TRANSISTORS FROM SAID EMITTER TO SAID COLLECTOR FOR CONTROLLING THE VOLTAGE APPLIED TO SAID TRANSISTORS, AND MEANS CONNECTED TO SAID BASE OF EACH OF SAID TRANSISTORS FOR CONTROLLING CONDUCTION THROUGH SAID EMITTER COLLECTOR CIRCUIT, SAID MEANS COMPRISING A THIRD AND FOURTH TRANSISTOR EACH HAVING A BASE, EMITTER AND COLLECTOR, SAID EMITTER OF EACH OF SAID THIRD AND FOURTH TRANSISTORS BEING CONNECTED TO A DIFFERENT BASE OF SAID FIRST AND SECOND TRANSISTORS, SAID EMITTER AND BASE OF EACH OF SAID THIRD AND FOURTH TRANSISTORS BEING CONNECTED TOGETHER ACROSS A SOURCE OF ELECTRICAL POTENTIAL, SAID COLLECTOR OF EACH OF SAID THIRD AND FOURTH TRANSISTORS BEING CONNECTED TO THE COLLECTOR OF ONE OF SAID FIRST AND SECOND TRANSISTORS.