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US3156830A Expired / Lapsed US ⏱️ 0.0 years remaining

Three-level asynchronous switching circuit

Assignee: International Business Machines Corp
•
Filing: 1961-12-22
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Granted: 1964-11-10
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Expires: 1981-12-22
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Abstract

No abstract record available.

Inventors

  • 👤 James L Walsh

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 09:24
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/08; H03K19/082; H03K19/0823

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 165 words
A CURRENT SWITCHING CIRCUIT HAVING AT LEAST THREE DIFFERENT STABLE OUTPUTS COMPRISING: A PAIR OF LIKE TRANSISTORS EACH HAVING AN EMITTER, A COLLECTOR AND A BASE; EACH OF SAID TRANSISTORS BEING BIASED FROM A CONSTANT CURRENT SOURCE; A PAIR OF UNILATERALLY CONDUCTING DEVICES CONNECTED IN PARALLEL OPPOSED CONDUCTING RELATION AND INTERCONNECTING THE EMITTER ELECTRODES OF THE SAID TRANSISTORS; SAID DEVICES BEING ALSO CONNECTED BETWEEN THE SAID CURRENT SOURCES COUPLED TO THE SAID TRANSISTORS; AN INPUT CIRCUIT CONNECTED TO THE BASE OF ONE OF THE SAID PAIR OF TRANSISTORS; THE BASE OF THE OTHER OF SAID PAIR OF TRANSISTORS BEING CONNECTED TO A SOURCE OF REFERENCE POTENTIAL; A NORMAL OUTPUT CIRCUIT CONNECTED TO THE COLLECTOR OF ONE OF THE SAID PAIR OF TRANSISTORS; AND A COMPLEMENTARY OUTPUT CIRCUIT CONNECTED TO THE COLLECTOR OF THE OTHER OF THE SAID PAIR OF TRANSISTORS; WHEREBY POSITIVE, GROUND AND NEGATIVE INPUT SIGNALS CAUSE A NORMAL OUTPUT OF TWO, ONE AND ZERO, AND A COMPLEMENTARY OUTPUT OF ZERO, ONE AND TWO.
Claim 2
Dependent Claim 165 words
A CURRENT SWITCHING CIRCUIT HAVING AT LEAST THREE DIFFERENT STABLE OUTPUTS COMPRISING: A PAIR OF LIKE TRANSISTORS EACH HAVING AN EMITTER, A COLLECTOR AND A BASE; EACH OF SAID TRANSISTORS BEING BIASED FROM A CONSTANT CURRENT SOURCE; A PAIR OF UNILATERALLY CONDUCTING DEVICES CONNECTED IN PARALLEL OPPOSED CONDUCTING RELATION AND INTERCONNECTING THE EMITTER ELECTRODES OF THE SAID TRANSISTORS; SAID DEVICES BEING ALSO CONNECTED BETWEEN THE SAID CURRENT SOURCES COUPLED TO THE SAID TRANSISTORS; AN INPUT CIRCUIT CONNECTED TO THE BASE OF ONE OF THE SAID PAIR OF TRANSISTORS; THE BASE OF THE OTHER OF SAID PAIR OF TRANSISTORS BEING CONNECTED TO A SOURCE OF REFERENCE POTENTIAL; A NORMAL OUTPUT CIRCUIT CONNECTED TO THE COLLECTOR OF ONE OF THE SAID PAIR OF TRANSISTORS; AND A COMPLEMENTARY OUTPUT CIRCUIT CONNECTED TO THE COLLECTOR OF THE OTHER OF THE SAID PAIR OF TRANSISTORS; WHEREBY POSITIVE, GROUND AND NEGATIVE INPUT SIGNALS CAUSE A NORMAL OUTPUT OF TWO, ONE AND ZERO, AND A COMPLEMENTARY OUTPUT OF ZERO, ONE AND TWO.

References Cited (Backward Citations)

US2972060A Cited
US3060330A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1967-11-10 1968-05-11 1968-11-10 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1971-11-10 1972-05-11 1972-11-10 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1975-11-10 1976-05-11 1976-11-10 $7700.00 Window Closed / Lapsed

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