Hybrid integrator circuit

Claim 1

AN ELECTRONIC INTEGRATOR CIRCUIT FOR INTEGRATING WITH RESPECT TO TIME FIRST AND SECOND INPUT SIGNALS TOGETHER REPRESENTING AN INPUT INDEPENDENT VARIABLE TO PROVIDE THIRD AND FOURTH OUTPUT SIGNALS TOGETHER REPRESENTING THE TIME INTEGRAL OF SAID VARIABLE, WHEREIN SAID FIRST AND THIRD SIGNALS ARE PARALLEL BINARY DIGITAL SIGNALS AND SAID SECOND AND FOURTH SIGNALS ARE ANALOG SIGNALS, SAID CIRCUIT COMPRISING IN COMBINATION: A COUNTER, MEANS FOR PERIODICALLY ADDING SAID FIRST PARALLEL BINARY SIGNAL TO THE NUMBER IN SAID COUNTER, THEREBY TO PROVIDE SAID THIRD SIGNAL; A FIRST DIGITAL-TO-ANALOG CONVERTER CONNECTED TO CONVERT A GROUP OF LEAST SIGNIFICANT DIGITS OF THE NUMBER IN SAID COUNTER INTO A FIRST VOLTAGE; AN ELECTRONIC ANALOG INTEGRATOR OPERABLE TO INTEGRATE SAID SECOND INPUT SIGNAL WITH RESPECT TO TIME TO PROVIDE A SECOND VOLTAGE; SAWTOOTH GENERATOR MEANS FOR GENERATING A CONSTANT PERIOD CONSTANT AMPLITUDE LINEAR SAWTOOTH VOLTAGE HAVING A PERIOD CORRESPONDING TO THE PERIODIC ADDITION OF SAID FIRST SIGNAL INTO SAID COUNTER; A SECOND DIGITAL-TO-ANALOG CONVERTER OPERABLE TO ATTENUATE SAID SAWTOOTH VOLTAGE IN ACCORDANCE WITH THE VALUE OF SAID FIRST SIGNAL TO PROVIDE A THIRD VOLTAGE; AND SUMMING MEANS FOR SUMMING SAID FIRST, SECOND AND THIRD VOLTAGES TO PROVIDE SAID FOURTH SIGNAL.