US3150310A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Control circuit for series connected semiconductors
Assignee: AT&T Inc
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Filing: 1960-12-30
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Granted: 1964-09-22
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Expires: 1980-12-30
Abstract
No abstract record available.
Inventors
- 👤 Cyrus F Ault
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 23:47
CPC Classifications
G; G05; G05F; G05F1/00; G05F1/10; G05F1/46; G05F1/56; G05F1/59; G05F1/595
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
167 words
IN COMBINATION, A PAIR OF INPUT TERMINALS UPON WHICH IS IMPRESSED AN UNREGULATED SOURCE OF POTENTIAL, A PAIR OF OUTPUT TERMINALS, A LOAD CONNECTED ACROSS SAID OUTPUT TERMINALS, A CONDUCTOR INTERCONNECTING ONE OF SAID INPUT TERMINALS WITH ONE OF SAID OUTPUT TERMINALS, A VARIABLE RESISTANCE REGULATING ELEMENT CONNECTED BETWEEN THE OTHER OF SAID INPUT AND OUTPUT TERMINALS AND COMPRISING A PLURALITY OF TRANSISTORS CONNECTED SERIALLY COLLECTOR TO EMITTER-WISE BETWEEN SAID OTHER TERMINALS, OUTPUT VOLTAGE ERROR SENSING MEANS CONNECTED TO THE BASE OF THE TRANSISTOR WHOSE EMITTER IS CONNECTED TO ONE OF SAID OTHER TERMINALS FOR VARYING ITS BASE CURRENT AS THE POTENTIAL OF SAID UNREGULATED SOURCE VARIES, A RESISTOR INDIVIDUAL TO AND CONNECTED TO THE BASE OF EACH REMAINING TRANSISTOR, AND A FIXED SOURCE OF POTENTIAL CONNECTED THROUGH SAID RESISTORS TO THE BASE OF SAID REMAINING TRANSISTORS FOR VARYING THE BASE CURRENT OF EACH FROM A FORWARD VALUE TO A REVERSE VALUE AS THE POTENTIAL OF THE UNREGULATED SOURCE RISES FROM ITS LOWER TO ITS UPPER EXTREME.
Claim 2
Dependent Claim
167 words
IN COMBINATION, A PAIR OF INPUT TERMINALS UPON WHICH IS IMPRESSED AN UNREGULATED SOURCE OF POTENTIAL, A PAIR OF OUTPUT TERMINALS, A LOAD CONNECTED ACROSS SAID OUTPUT TERMINALS, A CONDUCTOR INTERCONNECTING ONE OF SAID INPUT TERMINALS WITH ONE OF SAID OUTPUT TERMINALS, A VARIABLE RESISTANCE REGULATING ELEMENT CONNECTED BETWEEN THE OTHER OF SAID INPUT AND OUTPUT TERMINALS AND COMPRISING A PLURALITY OF TRANSISTORS CONNECTED SERIALLY COLLECTOR TO EMITTER-WISE BETWEEN SAID OTHER TERMINALS, OUTPUT VOLTAGE ERROR SENSING MEANS CONNECTED TO THE BASE OF THE TRANSISTOR WHOSE EMITTER IS CONNECTED TO ONE OF SAID OTHER TERMINALS FOR VARYING ITS BASE CURRENT AS THE POTENTIAL OF SAID UNREGULATED SOURCE VARIES, A RESISTOR INDIVIDUAL TO AND CONNECTED TO THE BASE OF EACH REMAINING TRANSISTOR, AND A FIXED SOURCE OF POTENTIAL CONNECTED THROUGH SAID RESISTORS TO THE BASE OF SAID REMAINING TRANSISTORS FOR VARYING THE BASE CURRENT OF EACH FROM A FORWARD VALUE TO A REVERSE VALUE AS THE POTENTIAL OF THE UNREGULATED SOURCE RISES FROM ITS LOWER TO ITS UPPER EXTREME.
References Cited (Backward Citations)
US2922945A
Cited
US2915693A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1967-09-22 | 1968-03-23 | 1968-09-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1971-09-22 | 1972-03-23 | 1972-09-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1975-09-22 | 1976-03-23 | 1976-09-22 | $7700.00 | Window Closed / Lapsed |