US3148332A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Signal translating system with isolation of input terminals from output terminals
Assignee: RCA Corp
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Filing: 1959-10-22
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Granted: 1964-09-08
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Expires: 1979-10-22
Abstract
No abstract record available.
Inventors
- 👤 Gerald E Theriault
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 15:15
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/04; H03F3/10; H03F3/12
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
108 words
A SIGNAL TRANSLATING SYSTEM COMPRISING MEANS PROVIDING A SOURCE OF SIGNALS, A TWO-TERMINAL NEGATIVE RESISTANCE SIGNAL TRANSLATING STAGE COUPLED TO SAID LAST NAMED MEANS, SAID SIGNAL TRANSLATING STAGE INCLUDING A NEGATIVE RESISTANCE DIODE STABLY BIASED TO EXHIBIT A NEGATIVE RESISTANCE A FOUR-TERMINAL NETWORK HAVING AN INPUT CIRCUIT AND AN OUTPUT CIRCUIT, SAID FOUR TERMINAL NETWORK INCLUDING A TRANSISTOR HAVING BASE, EMITTER AND COLLECTOR ELECTRODES INTERCONNECTED AS AN AMPLIFIER BETWEEN SAID INPUT AND OUTPUT CIRCUITS SO THAT SAID INPUT AND OUTPUT CIRCUITS ARE EFFECTIVELY ISOLATED FROM EACH OTHER, MEANS COUPLING SAID INPUT CIRCUIT TO SAID TWO-TERMINAL NEGATIVE RESISTANCE SIGNAL TRANSLATING STAGE, AND UTILIZATION MEANS COUPLED TO SAID OUTPUT CIRCUIT.
Claim 2
Dependent Claim
108 words
A SIGNAL TRANSLATING SYSTEM COMPRISING MEANS PROVIDING A SOURCE OF SIGNALS, A TWO-TERMINAL NEGATIVE RESISTANCE SIGNAL TRANSLATING STAGE COUPLED TO SAID LAST NAMED MEANS, SAID SIGNAL TRANSLATING STAGE INCLUDING A NEGATIVE RESISTANCE DIODE STABLY BIASED TO EXHIBIT A NEGATIVE RESISTANCE A FOUR-TERMINAL NETWORK HAVING AN INPUT CIRCUIT AND AN OUTPUT CIRCUIT, SAID FOUR TERMINAL NETWORK INCLUDING A TRANSISTOR HAVING BASE, EMITTER AND COLLECTOR ELECTRODES INTERCONNECTED AS AN AMPLIFIER BETWEEN SAID INPUT AND OUTPUT CIRCUITS SO THAT SAID INPUT AND OUTPUT CIRCUITS ARE EFFECTIVELY ISOLATED FROM EACH OTHER, MEANS COUPLING SAID INPUT CIRCUIT TO SAID TWO-TERMINAL NEGATIVE RESISTANCE SIGNAL TRANSLATING STAGE, AND UTILIZATION MEANS COUPLED TO SAID OUTPUT CIRCUIT.
References Cited (Backward Citations)
US2857462A
Cited
US2896018A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1967-09-08 | 1968-03-09 | 1968-09-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1971-09-08 | 1972-03-09 | 1972-09-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1975-09-08 | 1976-03-09 | 1976-09-08 | $7700.00 | Window Closed / Lapsed |