Electronic selection circuits

Claim 1

IN A SIGNALLING SYSTEM, A SELECTION CIRCUIT HAVING A PLURALITY OF SWITCHING STAGES, EACH OF SAID SWITCHING STAGES HAVING A TESTING INPUT FOR RECEIVING A POTENTIAL SIGNIFYING IDLE OR BUSY CONDITION, A MARKING OUTPUT FOR EXTENDING A POTENTIAL SIGNIFYING NEUTRAL CONDITION OR MARKING CONDITION, A COUPLING INPUT AND A COUPLING OUTPUT FOR RESPECTIVELY RECEIVING AND EXTENDING A POTENTIAL SIGNIFYING RELEASE OR BLOCKING, A FIRST GATE HAVING A FIRST INPUT CONNECTED WITH SAID COUPLING INPUT AND HAVING AN OUTPUT CONNECTED WITH SAID COUPLING OUTPUT, SAID FIRST GATE EXTENDING THE BLOCKING POTENTIAL FROM SAID COUPLING INPUT TO SAID COUPLING OUTPUT, A SECOND GATE OF A TYPE COMPLEMENTARY TO SAID FIRST GATE, SAID SECOND GATE BEING JOINTLY CONTROLLED BY THE POTENTIALS AT SAID COUPLING INPUT AND SAID TESTING INPUT AND EXTENDING A MARKING POTENTIAL TO SAID MARKING OUTPUT RESPONSIVE TO A RELEASE POTENTIAL AND AN IDLE POTENTIAL RESPECTIVELY EXTENDED TO SAID COUPLING INPUT AND TO SAID TESTING INPUT, AND AN INVERTER FOR ADAPTING THE POTENTIAL AT SAID COUPLING INPUT OR SAID TESTING INPUT FOR USE IN SAID FIRST OR SECOND GATE TO PROVIDE THEREBY A BLOCKING POTENTIAL AT A SECOND INPUT OF SAID FIRST GATE IN RESPONSE TO A RELEASE POTENTIAL AND AN IDLE POTENTIAL EXTENDED RESPECTIVELY TO SAID COUPLING INPUT AND TO SAID TESTING INPUT, EACH OF SAID SWITCHING STAGES COMPRISING FURTHER STORAGE DEVICE ASSUMING OPERATED POSITION RESPONSIVE TO POTENTIAL OF PREDETERMINED VALUE APPEARING AT SAID TESTING INPUT AND RETAINING SAID OPERATED POSITION FOR A PREDETERMINED TIME INTERVAL AT THE TERMINATION OF WHICH SAID STORAGE DEVICE IS RELEASED, MEANS FOR BLOCKING THE APPEARANCE OF MARKING POTENTIAL ON SAID MARKING OUTPUT UNTIL THE RELEASE OF SAID STORAGE DEVICE, AND COMPRISING FURTHER MEANS FOR RELEASING SAID STORAGE DEVICE WHEN THE MARKING POTENTIAL IS EXTENDED TO THE MARKING OUTPUT AND A TIMING PULSE IS EXTENDED TO A TIMING PULSE INPUT OF SAID STORAGE DEVICE.