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US3145345A Expired / Lapsed US ⏱️ 0.0 years remaining

Transistor linear peak detector for signals having wide dynamic range

Assignee: Individual
•
Filing: 1962-08-28
•
Granted: 1964-08-18
•
Expires: 1982-08-28
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Abstract

No abstract record available.

Inventors

  • 👤 Jerome C Squillaro
  • 👤 Henry D Tolj

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 19:56
CPC Classifications
H; H03; H03D; H03D1/00; H03D1/14; H03D1/18

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 278 words
A DETECTOR FOR DETECTING ALTERNATING CURRENT VOLTAGE SIGNALS OF SMALL SIGNAL STRENGTH AND OVER A WIDE DYNAMIC RANGE COMPRISING: AN INPUT FOR AN ALTERNATING CURRENT VOLTAGE SIGNAL TO BE DETECTED; AN AMPLIFIER HAVING FIRST AND SECOND TRANSISTOR STAGES, THE FIRST STAGE HAVING THE BASE COUPLED TO SAID INPUT AND THE EMITTER AND COLLECTOR EACH COUPLED THROUGH A RESISTOR TO THE POSITIVE AND NEGATIVE SIDES, RESPECTIVELY, OF A VOLTAGE SOURCE, AND THE SECOND STAGE HAVING THE BASE COUPLED TO THE COLLECTOR OF THE FIRST STAGE AND THE EMITTER AND COLLECTOR COUPLED ACROSS THE POSITIVE AND NEGATIVE SIDES, RESPECTIVELY, OF SAID VOLTAGE SOURCE WITH SAID COLLECTOR COUPLING BEING THROUGH A RESISTOR; A FIRST EMITTER FOLLOWER STAGE HAVING THE BASE THEREOF COUPLED TO THE COLLECTOR OF SAID SECOND STAGE TRANSISTOR AMPLIFIER, THE EMITTER COUPLED THROUGH A DIODE TO THE EMITTER OF SAID FIRST TRANSISTOR AMPLIFIER STAGE TO PROVIDE A NEGATIVE FEEDBACK AND THROUGH A RESISTOR TO SAID POSITIVE VOLTAGE SOURCE, AND THE COLLECTOR COUPLED TO SAID NEGATIVE VOLTAGE SOURCE; A SECOND EMITTER FOLLOWER HAVING THE BASE COUPLED TO THE COLLECTOR OF SAID SECOND TRANSISTOR AMPLIFIER, THE EMITTER COUPLED TO AN OUTPUT AND THROUGH A RESISTOR TO SAID POSITIVE VOLTAGE SOURCE, AND THE COLLECTOR COUPLED TO SAID NEGATIVE VOLTAGE SOURCE; AND A STORAGE MEANS COUPLED TO THE COMMON COUPLING OF THE COLLECTOR OF SAID SECOND TRANSISTOR AMPLIFIER AND THE BASES OF SAID FIRST AND SECOND TRANSISTOR EMITER FOLLOWERS WHEREBY INPUT SIGNALS ARE RECTIFIED TO PRODUCE A DIRECT CURRENT OUTPUT PROPORTIONAL TO SAID INPUT SIGNALS AND SAID NEGATIVE FEEDBACK VARIES THE EMITTER BIAS OF SAID FIRST TRANSISTOR AMPLIFIER TO PRODUCE HIGH GAIN FOR SMALL INPUT SIGNALS AND LOW GAIN FOR LARGE INPUT SIGNALS.
Claim 2
Dependent Claim 278 words
A DETECTOR FOR DETECTING ALTERNATING CURRENT VOLTAGE SIGNALS OF SMALL SIGNAL STRENGTH AND OVER A WIDE DYNAMIC RANGE COMPRISING: AN INPUT FOR AN ALTERNATING CURRENT VOLTAGE SIGNAL TO BE DETECTED; AN AMPLIFIER HAVING FIRST AND SECOND TRANSISTOR STAGES, THE FIRST STAGE HAVING THE BASE COUPLED TO SAID INPUT AND THE EMITTER AND COLLECTOR EACH COUPLED THROUGH A RESISTOR TO THE POSITIVE AND NEGATIVE SIDES, RESPECTIVELY, OF A VOLTAGE SOURCE, AND THE SECOND STAGE HAVING THE BASE COUPLED TO THE COLLECTOR OF THE FIRST STAGE AND THE EMITTER AND COLLECTOR COUPLED ACROSS THE POSITIVE AND NEGATIVE SIDES, RESPECTIVELY, OF SAID VOLTAGE SOURCE WITH SAID COLLECTOR COUPLING BEING THROUGH A RESISTOR; A FIRST EMITTER FOLLOWER STAGE HAVING THE BASE THEREOF COUPLED TO THE COLLECTOR OF SAID SECOND STAGE TRANSISTOR AMPLIFIER, THE EMITTER COUPLED THROUGH A DIODE TO THE EMITTER OF SAID FIRST TRANSISTOR AMPLIFIER STAGE TO PROVIDE A NEGATIVE FEEDBACK AND THROUGH A RESISTOR TO SAID POSITIVE VOLTAGE SOURCE, AND THE COLLECTOR COUPLED TO SAID NEGATIVE VOLTAGE SOURCE; A SECOND EMITTER FOLLOWER HAVING THE BASE COUPLED TO THE COLLECTOR OF SAID SECOND TRANSISTOR AMPLIFIER, THE EMITTER COUPLED TO AN OUTPUT AND THROUGH A RESISTOR TO SAID POSITIVE VOLTAGE SOURCE, AND THE COLLECTOR COUPLED TO SAID NEGATIVE VOLTAGE SOURCE; AND A STORAGE MEANS COUPLED TO THE COMMON COUPLING OF THE COLLECTOR OF SAID SECOND TRANSISTOR AMPLIFIER AND THE BASES OF SAID FIRST AND SECOND TRANSISTOR EMITER FOLLOWERS WHEREBY INPUT SIGNALS ARE RECTIFIED TO PRODUCE A DIRECT CURRENT OUTPUT PROPORTIONAL TO SAID INPUT SIGNALS AND SAID NEGATIVE FEEDBACK VARIES THE EMITTER BIAS OF SAID FIRST TRANSISTOR AMPLIFIER TO PRODUCE HIGH GAIN FOR SMALL INPUT SIGNALS AND LOW GAIN FOR LARGE INPUT SIGNALS.

References Cited (Backward Citations)

US2858423A Cited
US3023368A Cited
US3012137A Cited
US3098199A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1967-08-18 1968-02-17 1968-08-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1971-08-18 1972-02-17 1972-08-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1975-08-18 1976-02-17 1976-08-18 $7700.00 Window Closed / Lapsed

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