Universal logical package having means preventing clock-pulse splitting

Claim 1

UNIVERSAL LOGIC CIRCUIT PACKAGE COMPRISING: INPUT GATE MEANS PROVIDING OUTPUT SIGNALS OF EITHER A FIRST OR SECOND LEVEL ACCORDING TO THE CONDITIONING THEREOF; A FLIP-FLOP FOR PROVIDING OUTPUT SIGNALS OF SAID PACKAGE AND HAVING SET AND RESET INPUTS; A FIRST COINCIDENCE GATE HAVING ITS OUTPUT COUPLED TO ONE OF SAID FLIP-FLOP INPUTS; AT LEAST A SECOND COINCIDENCE GATE HAVING ITS OUTPUT COUPLED TO THE OTHER OF SAID FLIP-FLOP INPUTS; MEANS FOR SIMULTANEOUSLY IMPRESSING A CLOCK PULSE DIRECTLY UPON RESPECTIVE INPUTS OF BOTH OF SAID INPUT GATES; MEANS FOR SO COUPLING ANOTHER INPUT OF SAID FIRST COINCIDENCE GATE TO SAID OUTPUT SIGNALS OF SAID INPUT GATE MEANS THAT SAID FIRST COINCIDENCE GATE IS BIASED BY ONE OF SAID FIRST AND SECOND LEVELS FOR PASSING SAID CLOCK PULSE TO SAID FLIP-FLOP INPUT AND IS BIASED BY THE OTHER OF SAID FIRST AND SECOND LEVELS FOR PREVENTING PASSAGE OF SAID PULSE TO SAID ONE INPUT OF SAID FLIP FLOP; AND MEANS FOR IMPRESSING UPON ANOTHER INPUT OF SAID SECOND COINCIDENCE GATE A REFERENCE BIAS AT A LEVEL INTERMEDIATE SAID FIRST AND SECOND LEVELS SO THAT WHEN SAID FIRST COINCIDENCE GATE IS BIASED FOR PREVENTING PASSAGE OF SAID PULSE SAID SECOND COINCIDENCE GATE IS BIASED BY SAID REFERENCE BIAS FOR PASSING SAID CLOCK PULSE TO SAID OTHER INPUT OF SAID FLIP-FLOP AND WHEN SAID FIRST COINCIDENCE GATE IS BIASED BY SAID ONE OF SAID LEVELS FOR PASSING SAID CLOCK PULSE SAID SECOND COINCIDENCE GATE IS BIASED FOR PREVENTING PASSAGE OF SAID CLOCK PULSE TO SAID OTHER OF SAID FLIP-FLOP INPUTS.