US3138794A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Binary code translating device
Assignee: Unisys Corp
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Filing: 1961-10-25
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Granted: 1964-06-23
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Expires: 1981-10-25
Abstract
No abstract record available.
Inventors
- 👤 Robert J Blum
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 04:15
CPC Classifications
H; H03; H03M; H03M7/00; H03M7/14; H03M7/16
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
155 words
IN COMBINATION: (A) A NORMALLY-CLOSED INPUT GATE TO ADMIT BINARY CODED DATA, (B) A FLIP-FLOP FOR EACH BIT IN THE CODE TO BE USED, SAID FLIP-FLOPS BEING CONNECTED TO RECEIVE INFORMATION FROM THE INPUT GATE, (C) A READ PULSE SOURCE CONNECTED TO SET ALL OF THE FLIPFLOPS TO THE "ZERO" STATE, (D) A DELAY CIRCUIT INTERCONNECTING THE READ PULSE SOURCE AND THE INPUT GATE, SAID DELAY CIRCUIT SERVING TO OPEN THE INPUT GATE A PREDETERMINED TIME AFTER THE COMMENCEMENT OF A READ PULSE, (E) MEANS TO SET THE FLIP-FLOPS TO THE "ONE" STATE IN RESPONSE TO A SIGNAL RECEIVED THROUGH THE INPUT GATE, (F) AN OUTPUT GATE, (G) INDIVIDUAL CONDUCTORS EXTENDING BETWEEN EACH FLIPFLOP TO THE OUTPUT GATE AND CONNECTED TO CONDUCT A FINITE SIGNAL TO THE GATE WHENEVER THE FLIP-FLOP IS IN THE "ONE" STATE, (H) A CONVERT PULSE SOURCE, (I) A TAPPED DELAY LINE COUPLED TO RECEIVE ENERGY FROM THE CONVERT PULSE SOURCE,
Claim 2
Dependent Claim
155 words
IN COMBINATION: (A) A NORMALLY-CLOSED INPUT GATE TO ADMIT BINARY CODED DATA, (B) A FLIP-FLOP FOR EACH BIT IN THE CODE TO BE USED, SAID FLIP-FLOPS BEING CONNECTED TO RECEIVE INFORMATION FROM THE INPUT GATE, (C) A READ PULSE SOURCE CONNECTED TO SET ALL OF THE FLIPFLOPS TO THE "ZERO" STATE, (D) A DELAY CIRCUIT INTERCONNECTING THE READ PULSE SOURCE AND THE INPUT GATE, SAID DELAY CIRCUIT SERVING TO OPEN THE INPUT GATE A PREDETERMINED TIME AFTER THE COMMENCEMENT OF A READ PULSE, (E) MEANS TO SET THE FLIP-FLOPS TO THE "ONE" STATE IN RESPONSE TO A SIGNAL RECEIVED THROUGH THE INPUT GATE, (F) AN OUTPUT GATE, (G) INDIVIDUAL CONDUCTORS EXTENDING BETWEEN EACH FLIPFLOP TO THE OUTPUT GATE AND CONNECTED TO CONDUCT A FINITE SIGNAL TO THE GATE WHENEVER THE FLIP-FLOP IS IN THE "ONE" STATE, (H) A CONVERT PULSE SOURCE, (I) A TAPPED DELAY LINE COUPLED TO RECEIVE ENERGY FROM THE CONVERT PULSE SOURCE,
References Cited (Backward Citations)
US2764564A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1967-06-23 | 1967-12-23 | 1968-06-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1971-06-23 | 1971-12-23 | 1972-06-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1975-06-23 | 1975-12-23 | 1976-06-23 | $7700.00 | Window Closed / Lapsed |