Interceptor transformer for data storage

Claim 1

A CIRCUIT COMPRISING TWO INTERCEPTOR MEMORY TRANSFORMERS, EACH OF SAID TRANSFORMERS INCLUDING THREE ANNULAR MAGNETIC CORES CROSSING EACH OTHER AT DIAMETRALLY OPPOSED POINTS IN THREE MUTUALLY PERPENDICULAR PLANES, A PRIMARY COIL WOUND ON A FIRST INTERSECTION OF TWO OF THE CORES, AND A SECONDARY COIL WOUND ON A SECOND INTERSECTION; OF SAID TWO CORES DIAMETRICALLY OPPOSED TO THE FIRST INTERSECTION; AND AN AMPLIFIER HAVING ITS INPUT CONNECTED TO THE OUTPUT TERMINALS OF ONE TRANSFORMER AND ITS OUTPUT CONNECTED TO THE INPUT TERMINALS OF ANOTHER TRANSFORMER, THERE BEING A BIAS COIL WOUND ON THE THIRD ONE OF THE CORES, THE BIAS COIL OF EACH TRANSFORMER BEING CONNECTED TO A DIRECT CURRENT SOURCE, EACH OF SAID TRANSFORMERS HAVING TERMINALS CONNECTED TO THE PRIMARY COIL FOR APPLYING A DIRECT CURRENT TO THE PRIMARY AND TRIGGERING OUTPUT OF AN ALTERNATING CURRENT FROM THE OUTPUT TERMINALS OF THE TRANSFORMER, EACH OF THE CORES IN EACH TRANSFORMER CONSISTING OF A COIL OF MAGNETIC WIRE WOUND TO FORM AN ENDLESS RING, THE CORES BEING INTERWOVEN AT THEIR INTERSECTIONS TO FORM AN A.C. OUTPUT IN SECONDARY WHILE A DIRECT CURRENT SWEEPS FROM A LOW TO A HIGHER ENERGY IN THE PRIMARY, THE MAGNETIC PERMEABILITY OF THE CORES IN EACH TRANSFORMER VARYING PROGRESSIVELY AND DECREASING FROM PORTIONS OF MINIMUM DIAMETER OUTWARDLY TO PORTIONS OF MAXIMUM DIAMETER IN THE ASSEMBLY.