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Claim 1

IN A SYSTEM FOR THE TRANSMISSION OF DIGITAL DATA AT A FIXED SYNCHRONOUS BIT RATE, A SOURCE OF BINARY DIGITAL DATA SIGNAL BITS CONTINUOUSLY EMITTED AT A FLUCTUATING TIME RATE, A TRANSMISSION LINE ADAPTED TO TRANSMIT DATA SIGNALS AT A FIXED SYNCHRONOUS TIME RATE, AND MEANS INTERPOSED BETWEEN SAID SOURCE AND SAID LINE FOR TRANSLATING CONTINUOUS SIGNALS FROM SAID SOURCE INTO UNIFORM LENGTH BLOCKS OF SIGNALS FOR TRANSMISSION AT SAID SYNCHRONOUS RATE COMPRISING A SHIFTING REGISTER HAVING A FIXED NUMBER OF STORAGE CELLS LESS THAN THE NUMBER OF ELEMENTS IN SAID UNIFORM BLOCK LENGTH, A SWITCHING NETWORK FOR GAINING ACCESS TO INDIVIDUAL ONES OF THE STORAGE CELLS IN SAID REGISTER, CONNECTING MEANS BETWEEN SAID SOURCE AND SAID NETWORK FOR ADVANCING THE OPERATION OF SAID NETWORK ONE STEP IN ONE DIRECTION FOR EACH SIGNAL BIT STORED IN SAID REGISTER, A SYNCHRONIZING CLOCK SOURCE DETERMINING SAID SYNCHRONOUS TRANSMISSION RATE, MEANS RESPONSIVE TO THE FILLING OF THE FIXED NUMBER OF STORAGE CELLS IN SAID REGISTER FOR CONNECTING SAID CLOCK SOURCE TO SAID NETWORK AND REGISTER, SAID NETWORK STEPPING IN THE OPPOSITE DIRECTION FOR EACH OF SAID CLOCK PULSES AND THE CONTENTS OF THE CELLS