← Back to Patent Explorer
US3134928A Expired / Lapsed US ⏱️ 0.0 years remaining

Transistor vertical deflection circuits

Assignee: RCA Corp
•
Filing: 1962-03-23
•
Granted: 1964-05-26
•
Expires: 1982-03-23
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

No abstract record available.

Inventors

  • 👤 Larry A Freedman

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 05:04
CPC Classifications
H; H03; H03B; H03B29/00; H01; H01J; H01J17/00; H01J17/005; H03C; H03C1/00; H03C1/36; H03K; H03K4/00; H03K4/06; H03K4/08; H03K4/48; H03K4/60; H03K4/69; H03K4/72; H03K6/00; H03K6/04

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 316 words
IN A TELEVISION RECEIVER HAVING A CATHODE RAY IMAGE REPRODUCING TUBE, VERTICAL DEFLECTION WINDINGS FOR SAID TUBE, AND A SOURCE OF VERTICAL SYNCHRONIZING SIGNALS, A VERTICAL DEFLECTION CIRCUIT COMPRISING IN COMBINATION: A FIRST TRANSISTOR HAVING A BASE, A COLLECTOR, AND AN EMITTER; A CHARGING CAPACITOR CONNECTED TO THE BASE OF SAID FIRST TRANSISTOR; A CHARGING CIRCUIT FOR SAID CAPACITOR INCLUDING A SOURCE OF DIRECT VOLTAGE CONNECTED TO SAID CAPACITOR; A DISCHARGE CIRCUIT FOR SAID CAPACITOR INCLUDING A SECOND TRANSISTOR HAVING A BASE, A COLLECTOR, AND AN EMITTER, AND HAVING THE COLLECTOR-TO-EMITTER PATH OF SAID SECOND TRANSISTOR CONNECTED ACROSS SAID CAPACITOR; FIRST FEEDBACK MEANS CONNECTED BETWEEN THE COLLECTOR OF SAID FIRST TRANSISTOR AND THE BASE OF SAID SECOND TRANSISTOR FOR PROVIDING SELF-OSCILLATIONS IN SAID CIRCUIT SEQUENTIALLY TO CHARGE SAID CAPACITOR DURING A CHARGING CYCLE THROUGH SAID CHARGING CIRCUIT, AND TO DISCHARGE SAID CAPACITOR DURING A DISCHARGE CYCLE THROUGH THE COLLECTOR-TO-EMITTER PATH OF SAID SECOND TRANSISTOR; COUPLING MEANS FOR CONNECTING THE VERTICAL DEFLECTION WINDINGS TO THE COLLECTOR OF SAID FIRST TRANSISTOR FOR SUPPLYING DEFLECTION CURRENT THERETO; SECOND FEEDBACK MEANS COUPLED BETWEEN SAID COLLECTOR OF SAID FIRST TRANSISTOR AND THE BASE OF SAID FIRST TRANSISTOR SUCH THAT THE FEEDBACK SIGNAL APPLIED TO SAID FIRST TRANSISTOR IS DEGENERATIVE DURING THE FIRST PART OF THE CHARGING CYCLE OF SAID CHARGING CAPACITOR AND REGENERATIVE DURING THE SECOND PART OF THE CHARGING CYCLE OF SAID CHARGING CAPACITOR; THIRD FEEDBACK MEANS CONNECTED BETWEEN THE EMITTER OF SAID FIRST TRANSISTOR AND THE BASE OF SAID SECOND TRANSISTOR FOR APPLYING DURING SAID CHARGE CYCLE A VOLTAGE TO THE BASE OF SAID SECOND TRANSISTOR WHICH NEAR THE END OF SAID CHARGE CYCLE IS ABRUPTLY CHANGING IN A DIRECTION TENDING TO TURN ON SAID SECOND TRANSISTOR; AND MEANS FOR APPLYING SAID VERTICAL SYNCHRONIZING SIGNALS TO SAID SECOND TRANSISTOR TO INITIATE THE DISCHARGE CYCLE OF SAID CAPACITOR AND SYNCHRONIZE THE FREQUENCY OF SAID SELF-OSCILLATIONS TO SAID VERTICAL SYNCHRONIZING SIGNALS.
Claim 2
Dependent Claim 316 words
IN A TELEVISION RECEIVER HAVING A CATHODE RAY IMAGE REPRODUCING TUBE, VERTICAL DEFLECTION WINDINGS FOR SAID TUBE, AND A SOURCE OF VERTICAL SYNCHRONIZING SIGNALS, A VERTICAL DEFLECTION CIRCUIT COMPRISING IN COMBINATION: A FIRST TRANSISTOR HAVING A BASE, A COLLECTOR, AND AN EMITTER; A CHARGING CAPACITOR CONNECTED TO THE BASE OF SAID FIRST TRANSISTOR; A CHARGING CIRCUIT FOR SAID CAPACITOR INCLUDING A SOURCE OF DIRECT VOLTAGE CONNECTED TO SAID CAPACITOR; A DISCHARGE CIRCUIT FOR SAID CAPACITOR INCLUDING A SECOND TRANSISTOR HAVING A BASE, A COLLECTOR, AND AN EMITTER, AND HAVING THE COLLECTOR-TO-EMITTER PATH OF SAID SECOND TRANSISTOR CONNECTED ACROSS SAID CAPACITOR; FIRST FEEDBACK MEANS CONNECTED BETWEEN THE COLLECTOR OF SAID FIRST TRANSISTOR AND THE BASE OF SAID SECOND TRANSISTOR FOR PROVIDING SELF-OSCILLATIONS IN SAID CIRCUIT SEQUENTIALLY TO CHARGE SAID CAPACITOR DURING A CHARGING CYCLE THROUGH SAID CHARGING CIRCUIT, AND TO DISCHARGE SAID CAPACITOR DURING A DISCHARGE CYCLE THROUGH THE COLLECTOR-TO-EMITTER PATH OF SAID SECOND TRANSISTOR; COUPLING MEANS FOR CONNECTING THE VERTICAL DEFLECTION WINDINGS TO THE COLLECTOR OF SAID FIRST TRANSISTOR FOR SUPPLYING DEFLECTION CURRENT THERETO; SECOND FEEDBACK MEANS COUPLED BETWEEN SAID COLLECTOR OF SAID FIRST TRANSISTOR AND THE BASE OF SAID FIRST TRANSISTOR SUCH THAT THE FEEDBACK SIGNAL APPLIED TO SAID FIRST TRANSISTOR IS DEGENERATIVE DURING THE FIRST PART OF THE CHARGING CYCLE OF SAID CHARGING CAPACITOR AND REGENERATIVE DURING THE SECOND PART OF THE CHARGING CYCLE OF SAID CHARGING CAPACITOR; THIRD FEEDBACK MEANS CONNECTED BETWEEN THE EMITTER OF SAID FIRST TRANSISTOR AND THE BASE OF SAID SECOND TRANSISTOR FOR APPLYING DURING SAID CHARGE CYCLE A VOLTAGE TO THE BASE OF SAID SECOND TRANSISTOR WHICH NEAR THE END OF SAID CHARGE CYCLE IS ABRUPTLY CHANGING IN A DIRECTION TENDING TO TURN ON SAID SECOND TRANSISTOR; AND MEANS FOR APPLYING SAID VERTICAL SYNCHRONIZING SIGNALS TO SAID SECOND TRANSISTOR TO INITIATE THE DISCHARGE CYCLE OF SAID CAPACITOR AND SYNCHRONIZE THE FREQUENCY OF SAID SELF-OSCILLATIONS TO SAID VERTICAL SYNCHRONIZING SIGNALS.

References Cited (Backward Citations)

US2729766A Cited
US3054020A Cited
US2954504A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1967-05-26 1967-11-25 1968-05-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1971-05-26 1971-11-25 1972-05-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1975-05-26 1975-11-25 1976-05-26 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag