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US3131355A Expired / Lapsed US ⏱️ 0.0 years remaining

High speed pulse detector

Assignee: General Dynamics Corp
•
Filing: 1960-12-07
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Granted: 1964-04-28
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Expires: 1980-12-07
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Abstract

No abstract record available.

Inventors

  • 👤 Frank L Campanozzi
  • 👤 Niertit Frank

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 16:57
CPC Classifications
H; H04; H04Q; H04Q1/00; H04Q1/18; H04Q1/30; H04Q1/32

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 154 words
A HIGH SPEED PULSE DETECTOR COMPRISING, BISTABLE ELEMENT HAVING A FIRST CONTROL CIRCUIT FOR CAUSING SAID BISTABLE ELEMENT TO ASSUME A FIRST STATE WHEN A MARK PULSE IS APPLIED TO SAID FIRST CONTROL CIRCUIT, SAID BISTABLE ELEMENT HAVING A SECOND CONTROL CIRCUIT FOR CAUSING SAID BISTABLE ELEMENT TO ASSUME A SECOND STATE WHEN A MARK PULSE IS APPLIED TO SAID SECOND CONTROL CIRCUIT, AN OUTPUT CIRCUIT FOR PRODUCING AN OUTPUT SIGNAL INDICATIVE OF THE STATE OF SAID BISTABLE ELEMENT, MEANS HAVING A FIRST AND SECOND INPUT CIRCUIT AND AN OUTPUT CIRCUIT FOR PRODUCING A MARK PULSE IN SAID OUTPUT CIRCUIT WHEN A MARK PULSE IS APPLIED TO SAID SECOND INPUT CIRCUIT AND NO MARK PULSE IS APPLIED TO SAID FIRST INPUT CIRCUIT, A CLOCK PULSE SOURCE, MEANS FOR CONNECTING SAID CLOCK PULSE SOURCE TO THE SECOND INPUT CIRCUIT OF SAID MEANS FOR PRODUCING, MEANS FOR COUPLING THE FIRST CONTROL CIRCUIT OF SAID BISTABLE ELEMENT
Claim 2
Dependent Claim 154 words
A HIGH SPEED PULSE DETECTOR COMPRISING, BISTABLE ELEMENT HAVING A FIRST CONTROL CIRCUIT FOR CAUSING SAID BISTABLE ELEMENT TO ASSUME A FIRST STATE WHEN A MARK PULSE IS APPLIED TO SAID FIRST CONTROL CIRCUIT, SAID BISTABLE ELEMENT HAVING A SECOND CONTROL CIRCUIT FOR CAUSING SAID BISTABLE ELEMENT TO ASSUME A SECOND STATE WHEN A MARK PULSE IS APPLIED TO SAID SECOND CONTROL CIRCUIT, AN OUTPUT CIRCUIT FOR PRODUCING AN OUTPUT SIGNAL INDICATIVE OF THE STATE OF SAID BISTABLE ELEMENT, MEANS HAVING A FIRST AND SECOND INPUT CIRCUIT AND AN OUTPUT CIRCUIT FOR PRODUCING A MARK PULSE IN SAID OUTPUT CIRCUIT WHEN A MARK PULSE IS APPLIED TO SAID SECOND INPUT CIRCUIT AND NO MARK PULSE IS APPLIED TO SAID FIRST INPUT CIRCUIT, A CLOCK PULSE SOURCE, MEANS FOR CONNECTING SAID CLOCK PULSE SOURCE TO THE SECOND INPUT CIRCUIT OF SAID MEANS FOR PRODUCING, MEANS FOR COUPLING THE FIRST CONTROL CIRCUIT OF SAID BISTABLE ELEMENT

References Cited (Backward Citations)

US2851219A Cited
US2880317A Cited
US2903605A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1967-04-28 1967-10-28 1968-04-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1971-04-28 1971-10-28 1972-04-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1975-04-28 1975-10-28 1976-04-28 $7700.00 Window Closed / Lapsed

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